A metastable event occurs when the output of a logic device is neither a logic high nor a logic low level during a time period. Using a FIFO to synchronize digital signals operating at different frequencies may cause a metastable event to occur. This document assists designers in understanding and improving upon the metastable characteristics of the SN74ACT722xx family of synchronous style devices

TUSB2136-3210 FAQ

Application Note 241 Working with High Impedance Op Amps

While the Multiple FeedBack (MFB) filter topology is well-known its application to very high dynamic range analog-to-digital converter (ADC) interfaces requires a careful consideration of component value selection. This application report develops the ideal transfer function then introduces a component selection methodology and discusses its impact on noise and distortion. The impact of amplifie

This paper gives the reader a command of the simplest set of tools required to analyze and design feedback amplifiers. These tools are fundamental and they form the basis of feedback analysis and design.

A question that repeatedly gets asked is ?what values of R and C will give a filter response closest to a given frequency?? This note gives a quick answer to that question. A second question that often is asked ?does a lab really need to have a complete stock of 1% resistors in order to implement filters of any frequency?? While there is no single answer that fits every situation or budget this n

The UCC3588 voltage mode synchronous step down (buck) controller provides the functionality required for high efficiency, low cost, regulated power for microprocessors. A 5-bit DAC provides output vol

This application report discusses the implementation of an interface between the TLV5639 DAC and the TMS320C31 DSP. The TLV5619-5639EVM is used to demonstrate the complete circuit implementation. This

bq20z70, bq20z75, bq20z90, and bq20z95 Voltage, Current, and Temperature Measurement Accuracy

All major competitors in the operational amplifier markets are providing their customers Spice-based macromodels. These models give the designer a tool to do initial characterization and a limited amount of system troubleshooting. In the interest of faster simulation times and lower CPU memory requirements macro topologies have been developed to simulate a majority of the op amp's performance cha

Flash memory offers better cost per bit than traditional EPROM when storage density increases. Flash memory competes with EPROM with lower power consumption and smaller package and program content after assembling. These features make flash memory a good selection in applications like GPS receiver hand-held MP3 player and Set-Top Boxes.The Texas Instruments (TI)(tm)TMS320C54x family of digi

Configuration Security for the UCD911X

LB-47 High Voltage Adjustable Power Supplies

Four TI CMOS clocked first-in first-out (FIFO) memories the 2k?9 SN74ACT807 the 512?18 SN74ACT7803 the 256?18 SN74ACT7805 and the 64?18 SN748ACT7813 provide synchronous interfaces that conform to the requirements of many high-performance systems. The FIFO architecture limits the glue logic necessary and limits the timing constraints to the system. Each FIFO is easily expanded to accommodate var

This application report describes two related pieces of software that are used together to download an application over the DM644x UART0 serial interface and run it out of the ARM internal memory. The discussion begins with a description of a host application that executes on a user’s PC and includes a description of how to interface to the ROM boot loader of the DM644x device. The discussion of