SKEDD is a technology developed by Würth Elektronik with which connectors can be connected to the circuit board directly without soldering. This type of contact offers considerable advantages over soldered connectors.
The REDFIT IDC (insulation displacement connector) is the first series of connectors from Würth Elektronik which comes with SKEDD technology. In the meantime, renowned companies worldwide trust the advantages of SKEDD technology. In this Product Guide you will learn about the advantages of SKEDD and suitable applications for using SKEDD.

This document descirbes implementing the Live Update application on the SAM E54 MCU with the usage of the dual bank Flash.

This manual describes how to use the Renesas Flexible Software Package (FSP) for writing applications for the RZ/T2, RZ/N2 microprocessor series.

This document describes the contents of the Example Project Bundle for the EK-RA6E2 kit. The Example Projects contained within the bundle show how to write code for the various Renesas Flexible Software Package (FSP) modules supported by the EK-RA6E2 kit.

The CoreEDAC IP generates Error Detection And Correction (EDAC) circuitry for both internal (on-chip) and external RAM blocks. The user data is fed to the EDAC encoder, which calculates the parity bits and appends these to the user data, forming a codeword. The codeword is stored into the RAM. During user read, the read codeword is decoded first, which detects and corrects errors (if any), discards parity bits, and outputs the corrected user data word. Scrubbing periodically checks every memory location using the ECC decoder. If a location contains a corrupted word, the decoder detects and corrects the word. The scrubbing circuitry then writes the corrected word back to the same location. To provide normal access to the RAM and prevent decreasing performance, scrubbing is only done during idle periods. The scrubbing circuitry sets a proper write address and write enable signals, writing the corrected codeword back to the RAM. Writeback occurs only upon detecting an error.

This document is intended to guide MPLAB Harmony v2 users on how to develop applications using MPLAB Harmony V3.

This document contains information with respect to the software simulations of the XAUI protocol.

This application note explains how to use the F(1) computation macrocell in the SLG46880/1.

The F(1) Computation Macrocell, also referred to as the F(1) block, is a specialized block within the SLG46880/1’s Asynchronous State Machine (ASM) which allows the designer to trigger sequences of commands upon entering a new state of the ASM.

This application note describes how to design and build a true White noise generator with Pink and Brown noise outputs using the OPAMP PAK SLG7004.

Such a device is primarily used in testing and measuring parameters of different analog equipment.

This application note implements a Smart Blind Controller.

It describes the implemented logic, HVPAK SLG47115 implementation and the obtained results of two controller variants, designed for different types of shutter sensors.

This application note describes how to design and build a digital stereo volume and balance controller with mute function.

It is possible to design a fully functional cost-effective digital stereo volume control circuit using only one SLG47004 IC with a very low external components count.

This application note describes the High Voltage GreenPAK IC configurated as a LED driver with  brightness and color temperature control.

This application note describes how to make a high voltage relay driver that switches at zerocrossing with the SLG47105 GreenPAK. It uses a half wave rectifier and optocoupler to provide a zero-crossing voltage detector (ZCVD) externally. It is also delayed internally to account for the operating time of the relay and ZCVD circuit so the relay switches at a future zero-crossing.

This application note describes how to design and build a stereo full-bridge Universal Class D (UcD) audio power amplifier using the SLG47105 IC.

This application note demonstrates how to implement a basic RTG4 Field Programmable Gate Array (FPGA) fabric design using SmartDesign. The design drives LEDs on the RTG4 Development Kit board with different patterns based on the state of Reset Switch (SW7), User Switch (SW2), and User Switch (SW1).

This application note explains the following concepts/systems and processes:

• Creating a Libero System-on-Chip (SoC) project
• Implementing an RTG4 fabric design with SmartDesign
• Simulating the design
• Making pin assignments, running layout, and programming the RTG4 silicon.

This application note describes the design procedure of a serial data pattern generator for making visual effects with a chain of WS2812B addressable RGB LEDs, using the SLG46811V and its EPG 92-byte ROM module. This note also contains test results of the hardware prototype.

This application note illustrates how to use the SLG47004 to control a potentiometer with an encoder and to implement an adjustable voltage divider based on it.

This app note presents a detailed description of the implementation of an AC-AC Automatic Voltage Regulator (AVR) using a GreenPAK SLG46537V CMIC. The purpose of AVRs is to maintain the voltage supplied to sensitive equipment within the predefined safe and functional limits of the device.

For such applications, autotransformers are commonly employed providing different taps on windings which can be selected by electromechanical relays depending on the input voltages. A suitable controller is required to sense the input voltage and select a suitable tap to obtain the controlled output voltage. The low-cost SLG46537V CMIC is ideally suited for this purpose since it provides sufficient control circuitry to meet the requirements. The implementation of this CMIC as an AVR controller is thoroughly tested using appropriate experimentation, and the results verify the viability of the idea.

This application note describes two designs using the SLG46811 IC to create simple single wire communication between two ICs.

This application note covers the method of designing a peak detector circuit for a variable analog signal and includes a frequency monitor circuit used to calculate time between two consecutive peaks. The GreenPAK SLG46620 IC is used to create this circuit