TLK10034, TLK10232 10GBASE-KR Link Optimization with TLK10034 and TLK10232

Low Drift Amplifiers

Optimizing Efficiency in White LED Backlight Applications

TI's touch screen and audio codec/DAC devices such as the TSC2100 TSC2101 TSC2102 TLV320AIC26 TLV320AIC28 and the TLC320DAC26 have one or more audio-band programmable gain amplifiers (PGA) in their input circuitry. This application report describes how to implement this PGA function using the TLV320DAC26 as an example.

bq27545-G1 to bq27546-G1 Change List

The TMS320C62x™ digital signal processing library (DSPLIB) provides a set of C-callable assembly-optimized functions commonly used in signal processing applications e.g. filtering and transform. The DSPLIB includes several functions for each processing category based on the input parameter conditions to provide parameter-specific optimal performance. Therefore it is important to unders

The CDC857 and the CDCV850 devices are PLL-based differential clock drivers with a maximum operational frequency of 167 MHz. These devices have been designed to support a double-data-rate (DDR) specification and therefore they have higher immunity against incoupling common mode noise. However they require a differential clock input signal.This report shows (a) how to convert a single ended cl

TI OMAP4430 POP SMT Design Guideline

AN-131 Power Consumption Measurements and Optimization for CC2538 End Device with Z-Stack /Connectivity/App_Reports/2-CCxxxx_AppReports/CC2538_SWRA456/SWRA456

AN-673 2-Way Multiplexed LCD Drive and Low Cost A/D-Converter Using V/F Techniques wi th COP8 Microcontrollers

This application report discusses the design and use of the LME ultra-high fidelity power amplifier input stage ICs (drivers).

AN-925 Radiation Design Test Data for Advanced CMOS Product

Lead-acid batteries are finding considerable use as bothprimary and backup power sources. For complete batteryutilization the charger circuit must charge the batteryto full capacity while minimizing over-charging forextended battery life. Since battery capacity varies withtemperature the charger must vary the amount of chargewith temperature to realize maximum capacity and life.Si

Many of today's digital signal processors (DSPs) have incorporated cache into the on-chip memory to support higher clock rates. While cache improves processor throughput by reducing the average memory access time sub-optimal cache usage causes some performance overhead and could become a critical bottleneck in the system. Maximizing cache effectiveness becomes a key to boosting the overall system

The ADS1250, ADS1251, ADS1252, ADS1253 and ADS1254 family of high-resolution analog-to-digital converters (ADCs) share an advanced delta-sigma (ΔΣ) topology. This application note reviews

This application note discusses the use of SEPIC converters in various applications.

This application report compares LinBiCMOS and pure CMOS technologies for the design of high-speed low voltage differential signaling (LVDS) interface integrated circuits. LinBiCMOS is shown to be a superior technology choice in all areas. This includes elecrostatic discharge (EST) performance maximum data rate propagation delay and common mode output voltage control because of the availability

The synchronous buck converter controllers (TPS56100 TPS56300 TPS56xxx and TPS5602) made by Texas Instruments are specifically designed to provide excellent transient response and high efficiency to the microprocess power applications such as the TMS320C6000 and TMS320C5000 families from TI as well as similar digital loads. In addition hysteresis control method is used such that power supply