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Application Notes

bq27542-G1 Change List

Texas Instruments
bq27542-G1 Change List

bq27505-J3 to bq27505-J4 Change List

Texas Instruments
This document describes the change made from bq27505-J3 to bq27505-J4. The latest ordering information and data sheet are available on the Texas Instruments Web site. Note: bq27505-J3 uses firmware version 2.20 and the bq27505-J4 uses firmware version 2.24.

Implementing Serial Rapid IO PCB Layout on a TMS320TCI6482 Hardware Design (Rev. A)

Texas Instruments
This application report contains implementation instructions for the Serial Rapid I/O (SRIO) interface on the TMS320TCI6482 DSP device. The approach to specifying interface timing and physical requirements for the SRIO interface is quite different than previous approaches for other interfaces.

Serial Rapid I/O is an industry-standard high-speed switched-packet interconnect. Physical layer data

AN-1043 Compar COP878x to Enhanced COP8SAx7 Fam HW/SW Considerations

Texas Instruments
Comparison of COP878x to the Enhanced COP8SAx7 Family - Hardware/Software Considerati ons

GSM Adaptive Multi-Rate Voice Coding on the TMS320C62x(TM) DSP

Texas Instruments
This document describes the GSM adaptive multi-rate (AMR) voice coding implementation on the TMS320C62x(tm) generation DSP. It discusses the system requirements and provides two levels of detail for the subroutines--one for programmers who want to use the code in a basic GSM architecture and the other for programmers who want to use the code as a basis for optimizing code or modifying other algor

TMS320C6000 EMIF to TMS320C6000 Host Port Interface (Rev. B)

Texas Instruments
This application report describes the interface between the host port interface (HPI) and the external memory interface (EMIF) of the TMS320C6000™ digital signal processor (DSP). This report examines three possible pairings of the various TMS320C6000 devices: TMS320C6201/C6701 EMIF to TMS320C6201/C6701 HPI TMS320C6211C/C6711 EMIF to TMS320C6211/C6711 HPI and TMS320C64x™ EMIF to TMS3

TRF2050 Fractional-N/Integer-N Synthesizer (Rev. B)

Texas Instruments
This document describes the TRF2050 evaluation board and associated software. The TRF2050 evaluation board is comprised of a multi-layer printed circuit board. The following are included to aid in the assessment of this device:- The TRF2050 Functional Block Diagram- The TRF2050 Evaluation Board Mechanical Outline- The Evaluation Board Schematic- The Evaluation Board Part ListThe volt

Implementing the Color Space Transformation Algorithm Using the TMS320C2xx

Texas Instruments
The Texas Instruments (TI)(tm) TMS320 family of digital signal processors (DSPs) is widely used for digital image processing. Color space transformation one of the basic image processing algorithms is used for digital still camera color printer color scanner and other video product applications.This application report describes how to implement the algorithm of transforming the image color

Active Fail-Safe in TI's LVDS Receivers (Rev. B)

Texas Instruments
Differential line receivers commonly have fail-safe circuits to prevent the receiver from switching on input noise. Many innovative LVDS fail-safe solutions require either external components, with su

PCIe 1.0a Device Prevent Resume from S1

Texas Instruments
PCIe 1.0a Device Prevent Resume from S1 Application Note

JTAG/IEEE 1149.1 Design Considerations

Texas Instruments
Using surface-mount packages double-sided boards and multi-chip modules in board design results in the loss of physical access to the signals on these boards. JTAG or boundary scan provides a means of testing printed circuit boards and modules that might otherwise be untestable. This documents is a brief introduction to TI JTAG and its documentation. The basics of boundary scan are discussed.

Phase Synchronization with Multiple Devices and Frequencies (Rev. A)

Texas Instruments
This application note discusses how phase synchronization can be achieved when multiple chips are involved and also when the frequencies are not the same.

Precise Time Synchronization Over WLAN

Texas Instruments
Recently, there has been a big demand for connectivity in the consumer's and industrial's applications. The requirements and implementations are different, but the common denominator is reliability, r

TMS320C6000 Host Port to MPC860 Interface (Rev. A)

Texas Instruments
This application report describes an interface between the Motorola MPC860 microprocessor and the host port interface (HPI) of a Texas Instruments TMS320C6000™ (C6000™) digital signal processor (DSP) device. This document includes a schematic showing connections between the two devices PAL equations and verification that timing requirements are met for each device (tables and timing

Copying Compiler Sections from Flash to RAM on the TMS320F28xxx DSCs

Texas Instruments
This application report and associated code files provide functionality for copying initialized compiler sections from the internal Flash memory to the internal random access memory (RAM) of the TMS32

Reference Design

Texas Instruments
Reference Design TPS659119-Q1

Interfacing to the ADS8363 Pseudo-Differential Operating Mode

Texas Instruments
ADS8363, ADS7863, ADS7223 Interfacing to the ADS8363 Pseudo-Differential Operating Mode

TAS5132DDV2EVM

Texas Instruments
The TAS5132EVM PurePath Digital™ customer evaluation module (EVM) demonstrates the integrated circuits TAS5086PAG and TAS5132DDV from Texas Instruments. This application report covers the EVM specifications audio performance and power efficiency measurements graphs and design documentation that includes schematics parts list layout and mechanical design.

DN-49 UC2577 Controls SEPIC Converter for Automotive Applications

Texas Instruments
The Single-Ended Primary Inductance Converter (SEPIC) can convert an input voltage to an output voltage that is higher, lower, or equal to the input. Conversion is performed without the use of expensi

Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)

Texas Instruments
ADS6129, ADS6149 Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat

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