This application report presents methods of interfacing the ADS7866/67/68 12/10/8-bit SAR analog-to-digital converter to the MSP430F2013 universal serial interface (USI) in SPI mode. The flexible clocking scheme of the USI port along with the internal 16-bit shift register provides an easy hardware/software interface to this series of high-speed micro-power SAR converters.

This application note describes how to use a single GC2011 chip to perform the real-to-complex down conversion operation on four signals simultaneously. The input data is split into even and odd samples and then multiplexed into a time division multiplexed (TDM) format. The even sample TDM stream is input to the A-input of the chip and the odd sample TDM stream is input to the B-input. The I-half

CLC5526/CLC5956/CLC5902 Diversity Receiver Chipset

This document discusses the use of the ADS1247 and ADS1248 precision analog-to-digital converters (ADCs) together with a resistive temperature device (RTD) and thermocouple to measure temperature. Inc

This design note describes an output converter for battery-powered and automotive applications. It uses a UCC3803 BiCMOS current-mode controller to provide a 5V output at full load of 100mA from an input of 2.5-13.5V after an initial startup at 5V. The UC3803 is part of the UCC1800/1/2/3/4/5 family of high-speed low-power integrated circuits which contains all necessary control and drive compone

This application report describes the necessary steps needed by the third party developers to create a JTAG-based flash programmer for the Hercules™ family of microcontrollers. This document does not substitute the existing user guides on JTAG access to the target systems and how to program the Flash memory but rather serves as a central location to reference these documents with clarificat

TRF7960, TRF7960EVM, TRF7961 Implementation of ISO15693 Protocol in the TI TRF796x

This document shows a method that enables an IEEE 1149.1 (JTAG) boundary-scan test bus controller to hierarchically access and test 1149.1 circuits independent of circuit location within electronic systems. This approach allows the 1149.1 test bus to be used hierarchically as a system level test bus instead of restricting its use to the board level. An example of the connections for the hierarchic

The ADC08xxxx family of giga-sample ADCs (such as the ADC08D1500) incorporates sophisticated self-calibration circuitry. This capability is an important part of this device's impressive performance over a wide temperature range. This application report attempts to give the system designer a comprehensive description of how to make use of this feature.

TPS54160, TPS54360, TPS54340, TPS54560, TPS54540 Create a Split-Rail Power Supply with a Wide Input Voltage Buck Regulator

Multi-Drop Channel-Link Operation

The video scaling example demonstrates the real time video rescaling on DM642 EVM.The input video frames are scaled in different sizes and displayed on a VGA monitor.

Computer based simulation has an importance because it can significantly reduce the development time and therefore speed up the time-to-market process. The increased use of SPICE based simulation soft

This application report describes how to prepare a TCI648x application for the I2C boot load process.

The enclosed .zip archive contains all utilities and examples necessary to build a test application program it into DSKTCI6482's I2C ROM change the boot mode to I2C boot load and verify that the test application has been loaded from the I2C and is running correctly.

ADS8528, ADS8548, ADS8568 ADS8528, ADS8548, and ADS8568 Timing Considerations

The THS1007 and THS1009 are non-FIFO variations of the THS10064. They require some special procedures for properly resetting and configuring the device. This application brief explains the necessary steps required to get reliable data from these 10-bit two and four channel simultaneous sampling data converters.

Frequency-to-Voltage Converter Uses Sample-and-Hold to Improve Response and Ripple

The TMS320TCI6486/TMS320C6472 device contains two independent Ethernet MAC modules EMAC0 and EMAC1 and a shared MDIO controller. This document describes system implementation details of the EMAC and MDIO modules on TCI6486/C6472 device. For a detailed functional description of the EMAC/MDIO modules such as architecture and operation as well as register definitions see the TMS320C6472/TMS32