The ADCMP600, ADCMP601, and ADCMP602 are very fast comparators fabricated on Analog Devices? proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from ? 0.5 V to VCC + 0.2 V, low noise TTL-/CMOS-compatible output drivers, and latch inputs with adjustable hysteresis and/or shutdown inputs.The devices offer 5 ns propagation delay with 10 mV overdrive on 3 mA typical supply current.A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a ?0.5 V to +2.8 V input signal range up to a +5.5 V positive supply with a ?0.5 V to +5.8 V input signal range. Split input/output supplies with no sequencing restrictions on the ADCMP602 support a wide input signal range while still allowing independent output swing control and power savings.The TTL-/CMOS-compatible output stage is designed to drive up to 5 pF with full timing specs and to degrade in a graceful and linear fashion as additional capacitance is added. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided with a unique single-pin control option.The ADCMP600 is available in both 5-lead SC70 and SOT-23 packages, the ADCMP601 is available in a 6-lead SC70 package, and the ADCMP602 is available in 8-lead MSOP and LSCFP packages.ApplicationsHigh Speed InstrumentationClock and Data Signal RestorationLogic Level Shifting or TranslationPulse SpectroscopyHigh Speed Line ReceiversThreshold DetectionPeak and Zero-crossing DetectorsHigh Speed Trigger CircuitryPulse-width ModulatorsCurrent-/voltage-controlled OscillatorsAutomatic Test Equipment (ATE)

The ADCMP608 is a fast comparator fabricated on XFCB2, an Analog Devices, Inc. proprietary process. This comparator is exceptionally versatile and easy to use. Features include an input range from VEE ? 0.2 V to VCC + 0.2 V, low noise, TTL-/CMOS-compatible output drivers, and shutdown inputs. The device offers 40 ns propagation delays driving a 15 pF load with 10 mV overdrive on 500 ?A typical supply current.A flexible power supply scheme allows the device to operate with a single +2.5 V positive supply and a ?0.2 V to + 2.7 V input signal range up to a +5.5 V positive supply with a ?0.2 V to +5.7 V input signal range.The TTL-/CMOS-compatible output stage is designed to drive up to 15 pF with full rated timing specifications and to degrade in a graceful and linear fashion as additional capacitance is added. The input stage of the comparator offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded.The ADCMP608 is available in a tiny 6-lead SC70 package with a single-ended output and a shutdown pin.APPLICATIONS High speed instrumentation Clock and data signal restoration Logic level shifting or translation High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators

The ADE9000 is a highly accurate, fully integrated, multiphase energy and power quality monitoring device. Superior analog performance and a digital signal processing (DSP) core enable accurate energy monitoring over a wide dynamic range. An integrated high end reference ensures low drift over temperature with a combined drift of less than ?25 ppm/?C maximum for the entire channel including a programmable gain amplifier (PGA) and an analog-to-digital converter (ADC).The ADE9000 offers complete power monitoring capability by providing total as well as fundamental measurements on rms, active, reactive, and apparent powers and energies. Advanced features such as dip and swell monitoring, frequency, phase angle, voltage total harmonic distortion (VTHD), current total harmonic distortion (ITHD), and power factor measurements enable implementation of power quality measurements. The ? cycle rms and 10 cycle rms/12 cycle rms, calculated according to IEC 61000-4-30 Class S, provide instantaneous rms measurements for real-time monitoring.The ADE9000 offers an integrated flexible waveform buffer that stores samples at a fixed data rate of 32 kSPS or 8 kSPS, or a sampling rate that varies based on line frequency to ensure 128 points per line cycle. Resampling simplifies fast Fourier transform (FFT) calculation of at least 50 harmonics in an external processor.The ADE9000 simplifies the implementation of energy and power quality monitoring systems by providing tight integration of acquisition and calculation engines. The integrated ADCs and DSP engine calculate various parameters and provide data through user accessible registers or indicate events through interrupt pins. With seven dedicated ADC channels, the ADE9000 can be used on a 3-phase system or up to three single-phase systems. It supports current transformers (CTs) or Rogowski coils for current measurements. A digital integrator eliminates a discrete integrator required for Rogowski coils.The ADE9000 absorbs most complexity in calculations for a power monitoring system. With a simple host microcontroller, the ADE9000 enables the design of standalone monitoring or protection systems, or low cost nodes uploading data into the cloud.Note that throughout this data sheet, multifunction pins, such as CF4/EVENT/DREADY, are referred to either by the entire pin name or by a single function of the pin, for example, EVENT, when only that function is relevant.Applications Energy and power monitoring Power quality monitoring Protective devices Machine health Smart power distribution units Polyphase energy meters

The ADE9153B1 is a highly accurate, single-phase, energy metering IC with sensor monitoring and self-calibration. Sensor monitoring with mSure? technology allows meter health monitoring and advanced tamper detection. The monitoring feature allows the user to check the overall accuracy of the sensor and signal path to identify accuracy drifts that occur over time on the current and voltage channels, independently. Similarly, mSure offers advanced tamper detection with the ability to detect unusual changes on the sensors. mSure runs in parallel to the metering measurements, allowing uninterrupted and unaffected metrology in the ADE9153B. Self-calibration with mSure enables a meter to automatically calibrate the current and voltage channels without accurate reference meters or accurate sources when a shunt resistor is used as the current sensor. The self-calibration feature supports Class 1 and Class 2 meters.The ADE9153B includes three high performance analog-to-digital converters (ADCs), providing an 88 dB signal-to-noise ratio (SNR). The ADE9153B offers accurate measurement of line voltage and current, and calculates active, fundamental reactive, and apparent energy, as well as rms. A wide range of power quality information is included, such as dip and swell detection. Current Channel A is ideal for shunts and has a flexible gain stage providing full-scale input ranges from 62.5 mV peak down to 26.04 mV peak. Current Channel B has gain stages of 1?, 2?, and 4? for use with current transformers (CTs). A high speed, 10 MHz, serial peripheral interface (SPI) port allows access to the ADE9153B registers.1 Protected by U.S. Patents 8,350,558; 8,010,304; WO2013038176 A3; 0113507 A1; 0253102 A1; 0354266 A1; and 0154029 A1.

The ADF4007 is a high frequency divider/PLL synthesizer that can be used in a variety of communications applications. It can operate to 7.5 GHz on the RF side and to 120 MHz at the PFD. It consists of a low noise digital PFD (phase frequency detec-tor), a precision charge pump, and a divider/prescaler. The divider/prescaler value can be set by two external control pins to one of four values (8, 16, 32, or 64). The reference divider is permanently set to 2, allowing an external REFIN frequency of up to 240 MHz.A complete PLL (phase-locked loop) can be implemented if the synthesizer is used with an external loop filter and a VCO (voltage controlled oscillator). Its very high bandwidth means that frequency doublers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost.Applications Satellite communications Broadband wireless access CATV Instrumentation Wireless LANs

The ADF4252 is a dual fractional-N/integer-N frequencysynthesizer that can be used to implement local oscillators (LO)in the upconversion and downconversion sections of wirelessreceivers and transmitters. Both the RF and IF synthesizersconsist of a low noise digital phase frequency detector (PFD), aprecision charge pump, and a programmable reference divider.The RF synthesizer has a ?-?-based fractional interpolator thatallows programmable fractional-N division. The IF synthesizerhas programmable integer-N counters. A complete phase-lockedloop (PLL) can be implemented if the synthesizer is used withan external loop filter and voltage controlled oscillator (VCO).Control of all the on-chip registers is via a simple 3-wire interface.The device operates with a power supply ranging from 2.7 V to3.3 V and can be powered down when not in use.Applications Base stations for mobile radio (GSM, PCS, DCS, CDMA, WCDMA) Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA) Wireless LANs Communications test equipment CATV equipment

The ADF7012 is a low power FSK/GFSK/OOK/GOOK/ASK UHF transmitter designed for short-range devices (SRDs). The output power, output channels, deviation frequency, and modulation type are programmable by using four, 32-bit registers.The fractional-N PLL and VCO with external inductor enable the user to select any frequency in the 75 MHz to 1 GHz band. The fast lock times of the fractional-N PLL make the ADF7012 suitable in fast frequency hopping systems. The fine frequency deviations available and PLL phase noise performance facilitates narrow-band operation.There are five selectable modulation schemes: binary frequency shift keying (FSK), Gaussian frequency shift keying (GFSK), binary on-off keying (OOK), Gaussian on-off keying (GOOK), and amplitude shift keying (ASK). In the compensation register, the output can be moved in

The ADF7020-1 is a low power, highly integrated FSK/ GFSK/ ASK/ OOK/ GOOK transceiver designed for operation in thelow UHF and VHF bands. The ADF7020-1 uses an externalVCO inductor that allows users to set the operating frequencyanywhere between 135 MHz and 650 MHz. Using the divide-by-2circuit allows users to operate the device as low as 80 MHz.The typical range of the VCO is about 10% of the operatingfrequency. A complete transceiver can be built using a smallnumber of external discrete components, making the ADF7020-1 very suitable for price-sensitive and area-sensitiveapplications.The transmit section contains a VCO and low noisefractional-N PLL with output resolution of

The ADF7020 is a low power, low-IF transceiver designed for operation in the license-free ISM bands at 433MHz, 868MHz and 915MHz. It is suitable for circuit applications that meet either the European ETSI EN-300-220 or the North American FCC, Part 15.247 and 15.249 regulatory standards. It operates from a 2.3 V to 3.6V power supply with programmable output power from -16 to +13dBm in 0.3dBm steps. Its receiver sensitivity is -117.5dBm at 1kbits/s in FSK mode or -110.5dBm at 9.6kbits/s. Power consumption is 20mA in receive mode and 30mA in transmit mode (+10dBm output).Other features include on-chip VCO (voltage controlled oscillator), Fractional-N PLL, on-chip 7-bit ADC (analog-to-digital converter), digital received signal strength indication (RSSI), temperature sensor and a patent pending fully automatic AFC loop. This allows the ADF7020 to be used with lower tolerance crystals. Its leakage current is < 1uA in power down mode.This device is suitable for circuit applications that meet the European ETSI-300-220, the North American FCC (Part 15), or the Chinese Short Range Device regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7020 very suitable for price-sensitive and area-sensitive applications. The transmitter block on the ADF7020 contains a VCO and low noise fractional-N PLL with an output resolution of

The ADF7021 is a low power, highly integrated 2FSK/3FSK/4FSK transceiver. It is designed to operate in the narrowband, license-free ISM bands and licensed bands in the 80 MHz to 650 MHz and 862 MHz to 940 MHz frequency ranges. It has both Gaussian and raised cosine data filtering options to improve spectral efficiency for narrowband applications.It is suitable for circuit applications targeted at European ETSI-EN 300-220, the Japanese ARIB STD-T67, the Chinese Short Range Device regulations, and the North American FCC Part 15, Part 90, and Part 95 regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7021 very suitable for price-sensitive and area-sensitive applications.The transmit section contains a voltage controlled oscillator (VCO) and a low noise fractional-N PLL with output resolution of

The ADF7021-N is a high performance, low power, narrow-band transceiver based on the ADF7021. The ADF7021-N has IF filter bandwidths of 9 kHz, 13.5 kHz, and 18.5 kHz, making it ideally suited to worldwide narrowband standards and particularly those that stipulate 12.5 kHz channel separation. It is designed to operate in the narrow-band, license-free ISM bands and in the licensed bands with frequency ranges of 80 MHz to 650 MHz and 842 MHz to 916 MHz. The part has both Gaussian and raised cosine transmit data filtering options to improve spectral efficiency for narrow-band applications. It is suitable for circuit applications targeted at the Japanese ARIB STD-T67, the European ETSI EN 300 220, the Korean short range device regulations, the Chinese short range device regulations, and the North American FCC Part 15, Part 90, and Part 95 regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7021-N very suitable for price-sensitive and area-sensitive applications. The range of on-chip FSK modulation and data filtering options allows users greater flexibility in their choice of modulation schemes while meeting the tight spectral efficiency requirements. The ADF7021-N also supports protocols that dynamically switch among 2FSK, 3FSK, and 4FSK to maximize communica-tion range and data throughput. The transmit section contains two voltage controlled oscillators (VCOs) and a low noise fractional-N PLL with an output resolution of The frequency-agile PLL allows the ADF7021-N to be used in frequency-hopping, spread spectrum (FHSS) systems. Both VCOs operate at twice the fundamental frequency to reduce spurious emissions and frequency pulling problems. The transmitter output power is programmable in 63 steps from ?16 dBm to +13 dBm and has an automatic power ramp control to prevent spectral splatter and help meet regulatory standards. The transceiver RF frequency, channel spacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of 2.3 V to 3.6 V and can be powered down when not in use. A low IF architecture is used in the receiver (100 kHz), which minimizes power consumption and the external component count yet avoids dc offset and flicker noise at low frequencies. The IF filter has programmable bandwidths of 9 kHz, 13.5 kHz, and 18.5 kHz. The ADF7021-N supports a wide variety of pro-grammable features including Rx linearity, sensitivity, and IF bandwidth, allowing the user to trade off receiver sensitivity and selectivity against current consumption, depending on the application. The receiver also features a patent-pending automatic frequency control (AFC) loop with programmable pull-in range that allows the PLL to track out the frequency error in the incoming signal. The receiver achieves an image rejection performance of 56 dB using a patent-pending IR calibration scheme that does not require the use of an external RF source. An on-chip ADC provides readback of the integrated tempera-ture sensor, external analog input, battery voltage, and RSSI signal, which provides savings on an ADC in some applications. The temperature sensor is accurate to ?10?C over the full oper-ating temperature range of ?40?C to +85?C. This accuracy can be improved by performing a 1-point calibration at room temperature and storing the result in memory.

The ADF7022 is a very low power, high performance, highlyintegrated FSK/GFSK transceiver designed for operation at thethree io-homecontrol? channels at 868.25 MHz, 868.95 MHz and 869.85 MHz in the license-free ISM band. The ADF7022 is fully compliant to ETSI-300-220, and is based on the popular ADF7020 transceiver with enhanced digital baseband features specifically designed for the io-homecontrol? standard.APPLICATIONS Home automation Process and building control

The ADF7023 is a very low power, high performance, highly integrated 2FSK/GFSK/OOK/MSK/GMSK transceiver designed for operation in the 862 MHz to 928 MHz and 431 MHz to 464 MHz frequency bands, which cover the worldwide license-free ISM bands at 433 MHz, 868 MHz, and 915 MHz. It is suitable for circuit applications that operate under the European ETSI EN300-220, the North American FCC (Part 15), the Chinese short-range wireless regulatory standards, or other similar regional standards. Data rates from 1 kbps to 300 kbps are supported.The transmit RF synthesizer contains a VCO and a low noise fractional-N PLL with an output channel frequency resolution of 400 Hz. The VCO operates at 2? or 4?, the fundamental frequency to reduce spurious emissions. The receive and transmit synthesizer bandwidths are automatically, and independently, configured to achieve optimum phase noise, modulation quality, and settling time. The transmitter output power is programmable from ?20 dBm to +13.5 dBm, with automatic PA ramping to meet transient spurious specifications. The part possesses both single-ended and differential PAs, which allows for Tx antenna diversity.The receiver is exceptionally linear, achieving an IP3 specification of ?12.2 dBm and ?11.5 dBm at maximum gain and minimum gain, respectively, and an IP2 specification of 18.5 dBm and 27 dBm at maximum gain and minimum gain, respectively. The receiver achieves an interference blocking specification of 66 dB at ?2 MHz offset and 74 dB at ?10 MHz offset. Thus, the part is extremely resilient to the presence of interferers in spectrally noisy environments. The receiver features a novel, high speed, automatic frequency control (AFC) loop, allowing the PLL to find and correct any RF frequency errors in the recovered packet.A patent pending, image rejection calibration scheme is available through a program download. The algorithm does not require the use of an external RF source nor does it require any user intervention once initiated. The results of the calibration can be stored in nonvolatile memory for use on subsequent power-ups of the transceiver.See data sheet for additional information.Applications Smart metering IEEE 802.15.4g Wireless MBUS Home automation Process and building control Wireless sensor networks (WSNs) Wireless healthcare

The ADF7024 is an ultralow power, integrated transceiver for use in the license-free ISM bands at 433 MHz, 868 MHz, and 915 MHz. Its ease of use and high performance make it suitable for a wide variety of wireless applications. The ADF7024 is suitable for operation under the European ETSI EN 300-220 regulation, the North American FCC Part 15 regulation, and other similar regulatory standards.The ADF7024 can operate under a number of predefined radio profiles. For each radio profile, optimized register settings are provided for the ADF7024 radio. This ensures that the RF communication layer works seamlessly, allowing the user to concentrate on the protocol and system level design and prototyping. The radio profiles cover common data rate and modulation options. There are six radio profiles in total, as shown in Table 1.The ADF7024 operates with a power supply range of 2.2 V to 3.6 V and has very low power consumption in both Tx and Rx modes, enabling long lifetimes in battery-operated systems while maintaining excellent RF performance.The low IF receiver minimizes power consumption and provides excellent sensitivity. The receiver is exceptionally linear and, therefore, is very resilient to the presence of interferers in spectrally noisy environments. The highly efficient transmitter has programmable output power up to 13.5 dBm and automatic power amplifier (PA) ramping to meet transient spurious specifications. The RF synthesizer comprises a voltage controlled oscillator (VCO), a low noise fractional-N phase-locked loop (PLL) and a loop filter, all of which are fully integrated and automatically calibrated. This agile frequency synthesizer facilitates the implementation of frequency-hopping spread spectrum (FHSS) systems.The smart wake mode (SWM) allows the ADF7024 to wake up autonomously from sleep using the internal wake-up timer without intervention from the host processor. This functionality allows carrier sense, packet sniffing, and packet reception while the host processor is in sleep, thereby reducing overall system current consumption.The ADF7024 eases the processing burden of the host processor by integrating the lower layers of a typical communication protocol stack. The host processor can configure the ADF7024 using a simple command-based protocol over a standard 4-wire SPI interface. A single-byte command transitions the radio between states or performs a radio function.A complete wireless solution can be built using a small number of external discrete components and a host processor (typically a microcontroller).For more information, see the ADF7024 Hardware Reference Manual, UG-698, which is only available as part of the ADF7024 design resource package.APPLICATIONS Wireless sensor networks (WSNs) Home and building automation Asset tracking Process and building control Industrial control Internet of Things (IoT)

The ADF7241 is a highly integrated, low power, and high performance transceiver for operation in the global 2.4 GHz ISM band. It is designed with emphasis on flexibility, robustness, ease of use, and low current consumption. The IC supports the IEEE 802.15.4-2006 2.4 GHz PHY requirements in both packet and data streaming modes. With a minimum number of external components, it achieves compliance with the FCC CFR47 Part 15, ETSI EN 300 440 (Equipment Class 2), ETSI EN 300 328 (FHSS, DR > 250 kbps), and ARIB STD T-66 standards.The ADF7241 complies with the IEEE 802.15.4-2006 2.4 GHz PHY requirements with a fixed data rate of 250 kbps and DSSS-OQPSK modulation. The transmitter path of the ADF7241 is based on a direct closed-loop VCO modulation scheme using a low noise fractional-N RF frequency synthesizer. The automatically calibrated VCO operates at twice the fundamental frequency to reduce spurious emissions and avoid PA pulling effects. The bandwidth of the RF frequency synthesizer is automatically optimized for transmit and receive operations to achieve best phase noise, modulation quality, and synthesizer settling time performance. The transmitter output power is programmable from ?20 dBm to +4 dBm with automatic PA ramping to meet transient spurious specifications. An integrated biasing and control circuit is available in the IC to significantly simplify the interface to external PAs.For more information, please refer to the data sheet.Applications Wireless sensor networks Automatic meter reading/smart metering Industrial wireless control Healthcare Wireless audio/video Consumer electronics ZigBee

The ADFS5758 is a single-channel, 16-bit, current/voltage output DAC. The device is functional safety approved for unipolar current output and is a fully compliant item with a systematic capability of SC3, which can be used in safety-related applications up to SIL 2, according to IEC 61508. This arrangement allows a single ADFS5758 to be used to achieve SIL 2 for a nonredundant configuration. The safe state for the ADFS5758 is open circuit/high impedance.The ADFS5758 is a single-channel, voltage and current output digital-to-analog converter (DAC) that operates with a power supply range from ?33 V minimum on AVSS to +33 V maximum on AVDD1 with a maximum operating voltage between the two rails of 60 V. On-chip dynamic power control (DPC) minimizes package power dissipation, which is achieved by regulating the supply voltage (VDPC+) to the VIOUT output driver circuitry from 4.95 V to 27 V using a buck dc-to-dc converter, optimized for minimum on-chip power dissipation. The CHART pin enables a HART? signal to be coupled onto the current output.The device uses a versatile 4-wire serial peripheral interface (SPI) that operates at clock rates of up to 50 MHz and is compatible with standard SPI, QSPI?, MICROWIRE?, DSP, and microcontroller interface standards. The interface also features an optional SPI cyclic redundancy check (CRC) and a windowed watchdog timer. The ADFS5758 offers improved diagnostic features from its predecessors, such as an integrated independent 12-bit diagnostic analog-to-digital converter (ADC) that can be used to digitize both internal and external nodes.Product HighIights Functional safety approved to SIL 2/SC3 by T?V Rheinland. Range of advanced diagnostic features, including an integrated ADC for high reliability. DPC using an integrated buck dc-to-dc converter for thermal management. When used with the ADP1031, the ADFS5758 enables eight channel to channel isolated outputs at

The ADG5208F and ADG5209F are 8:1 and dual 4:1 analogmultiplexers. The ADG5208F switches one of eight inputs to acommon output, and the ADG5209F switches one of fourdifferential inputs to a common differential output. An EN inputon both devices enables or disables the device. Each channelconducts equally well in both directions when on, and eachchannel has an input signal range that extends to the supplies.The digital inputs are compatible with 3 V logic inputs over thefull operating supply range.When no power supplies are present, the channelremains in the offcondition, and the switch inputs are high impedance. Under normaloperating conditions, if the analog input signal levels on any Sx pinexceed positive fault voltage (VDD) or negative fault voltage (VSS)by a threshold voltage (VT), the channel turns off and that Sx pinbecomes high impedance. If the fault channel is selected, the drainpin is pulled to the secondary supply voltage that was exceeded.Input signal levels of up to ?55 V or +55 V relative to ground areblocked, in both the powered and unpowered conditions.The low capacitance and charge injection of these switches makethem ideal solutions for data acquisition and sample-and-holdapplications, where low glitch switching and fast settling timesare required.Product Highlights The source pins are protected against voltages greater than the supply rails, up to ?55 V and +55 V. The source pins are protected against voltages between ?55 V and +55 V in an unpowered state. Trench isolation guards against latch-up. Optimized for low charge injection and on capacitance. The ADG5208F/ADG5209F can be operated from a dual supply of ?5 V up to ?22 V or a single power supply of 8 V up to 44 V.Applications Analog input/output modules Process control/distributed control systems Data acquisition Instrumentation Avionics Automatic test equipment Communication systems Relay replacement

The ADG5243F comprises three independently selectable, singlepole/double-throw (SPDT) switches. All channels exhibit break-before-make switching action that prevents momentary shorting when switching channels. An EN input enables or disables the device. When disabled, all channels are switched off. Each switch conducts equally well in both directions when on, and each switch has an input signal range that extends to the supplies. The primary supply voltages define the on-resistance profile, whereas the secondary supply voltages define the voltage level at which the overvoltage protection engages.When no power supplies are present, the channel remains in the off condition, and the switch inputs are high impedance. Undernormal operating conditions, if the analog input signal levels on any Sx pin exceed the positive fault voltage (POSFV) or the negative fault voltage (NEGFV) by a threshold voltage (VT), the channel turns off and that Sx pin becomes high impedance. If the switch is selected to be on, then the drain pin is pulled to the secondary supply voltage that was exceeded. Input signal levels upto ?55 V or +55 V relative to ground are blocked, in both the powered and unpowered conditions.The low capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-andholdapplications, where low glitch switching and fast settling times are required.Note that, throughout this data sheet, multifunction pins, such as IN1/F1, are referred to either by the entire pin name or by asingle function of the pin, for example, IN1, when only that function is relevant.Product Highlights The source pins are protected against voltages greater than?the secondary supply rails, up to ?55 V and +55 V. The source pins are protected against voltages between??55 V and +55 V in an unpowered state. Overvoltage detection with the digital output indicates the?operating state of the switches. Trench isolation guards against latch-up. Optimized for low charge injection and on-capacitance. The ADG5243F can be operated from a dual supply of ?5 V?to ?22 V or a single power supply of 8 V to 44 V.Applications Analog input/output modules? Process control/distributed control systems? Data acquisition? Instrumentation? Avionics? Automatic test equipment? Communication systems? Relay replacement?

The ADG5248F and ADG5249F are 8:1 and dual 4:1 analog multiplexers. The ADG5248F switches one of eight inputs to a common output and the ADG5249F switches one of four differential inputs to a common differential output. Each channel conducts equally well in both directions when on, and each channel has an input signal range that extends to the supplies. The primary supply voltages define the on-resistance profile, whereas the secondary supply voltages define the voltage level at which the overvoltage protection engages.When no power supplies are present, the channel remains in the off condition, and the switch inputs are high impedance. Under normal operating conditions, if the analog input signal levels on any Sx pin exceed positive fault voltage (POSFV) or negative fault voltage (NEGFV) by a threshold voltage (VT), the channel turns off and that Sx pin becomes high impedance. If the switch is selected to be on, then the drain pin is pulled to the secondary supply voltage that was exceeded. Input signal levels up to +55 V or ?55 V relative to ground are blocked, in both the powered and unpowered condition.The low capacitance and charge injection of these switches make them ideal solutions for data acquisition and sample-and-hold applications, where low glitch switching and fast settling times are required.?Note that, throughout this data sheet, multifunction pins, such as A0/F2, are referred to either by the entire pin name or by a single function of the pin, for example, A0, when only that function is relevant.?Product Highlights Source pins are protected against voltages greater than the secondary supply rails, up to ?55 V and +55 V. Source pins are protected against voltages between ?55 V and +55 V in an unpowered state. Overvoltage detection with digital output indicates operating state of switches. Trench isolation guards against latch-up. Optimized for low charge injection and on-capacitance. The ADG5248F/ADG5249F can be operated from a dual?supply of ?5 V to ?22 V or a single power supply of 8 V to 44 V.Applications Analog input/output modules Process control/distributed control systems Data acquisition Instrumentation Avionics Automatic test equipment Communication systems Relay replacement

The ADG5401F main channel switch is a SPST, low on-resistance switch that features overvoltage protection, power off protection, and overvoltage detection on the source pins (S and SFB). The ADG5401F also features a protected secondary feedback channel for use with digital-to-analog converter (DAC) or amplifier outputs.When no power supplies are present, the switch remains in the off condition, and the switch inputs are high impedance.When powered, if the analog input signal levels on the S pin exceed VDD or VSS by a threshold voltage (VT) the switch turns off, the open-drain FF pin pulls to a logic low and a path between the D and DFB pins is switched on to prevent an open-loop condition on the amplifier output. Input signal levels up to +60 V or ?60 V relative to ground are blocked, in both the powered and unpowered condition. The selectable POC pin function allows the protected switch terminal, S, to be connected to GND to minimize glitches on the output. The switch turns on with a Logic 1 input and conducts equally well in both directions. The digital input is compatible with 1.8 V logic inputs over the full operating supply range.Product Highlights Source pin is protected against voltages greater than the supply rails, up to ?60 V and +60 V in both powered and unpowered states. Overvoltage detection with digital output indicates operating state of switches. Trench isolation guards against latch-up. The ADG5401F can operate from a dual supply range of ?5 V to ?22 V or a single-supply range of +8 V to +44 V. Negative channel metal oxide semiconductor (NMOS) only architecture requires 2 V headroom toward VDD and provides low RON and ultraflat RON across the VSS to VDD ? 5 V signal range.Application DAC output protection Amplifier output protection Analog output modules Process control/distributed control systems Data acquisition Instrumentation