Demonstration board for L6491 gate driver with smart shut down feature

STKNX Minature Transceiver Interface Evaluation Board

BlueNRG-2 Evaluation Kit

Bluetooth Development Tools - 802.15.1 Evaluation platform based on the BlueNRG-

Evaluation platform based on BlueNRG-355MC system-on-chip

BMD-341-A Evaluation Kit w/ SEGGER J-Link-OB Debug Probe

Bluetooth? 5 Evaluation Board for CYBT-243053-02

The HMC618ALP3E is a GaAs pHEMT MMIC Low Noise Amplifier that is ideal for Cellular/3G and LTE/WiMAX/4G basestation front-end receivers operating between 1.2 - 2.2 GHz. The amplifier has been optimized to provide 0.75 dB noise figure, 19 dB gain and +36 dBm output IP3 from a single supply of +5V. Input and output return losses are excellent and the LNA requires minimal external matching and bias decoupling components. The HMC618ALP3E shares the same package and pinout with the HMC617LP3E 0.55 - 1.2 GHz LNA. The HMC618ALP3E can be biased with +3V to +5V and features an externally adjustable supply current which allows the designer to tailor the linearity performance of the LNA for each application. The HMC618ALP3E offers improved noise figure versus the previously released HMC375LP3(E) and the HMC382LP3(E).Applications Cellular/3G and LTE/WiMAX/4G BTS & Infrastructure Repeaters and Femto Cells Public Safety Radio

The HMC788A is a 0.01 GHz to 10 GHz, gain block, monolithic microwave integrated circuit (MMIC) amplifier using gallium arsenide (GaAs), pseudomorphic high electron mobility transistor (pHEMT) technology.This 2 mm ? 2 mm LFCSP amplifier can be used as either a cascadable 50 ? gain stage, or to drive the local oscillator (LO) port of many of the single and double balanced mixers from Analog Devices, Inc. with up to 20 dBm output power.The HMC788A offers 14 dB of gain and an output IP3 of 33 dBm while requiring only 76 mA from a 5 V supply.The Darlington feedback pair exhibits reduced sensitivity to normal process variations and yields excellent gain stability over temperature while requiring a minimal number of external bias components.Applications Cellular, 3G, LTE, WiMAX, and 4G LO driver applications Microwave radio Test and measurement equipment Ultra wideband (UWB) communications

The AD1018 is an analog front end (AFE) that has a high precision analog-to-digital converter (ADC), voltage output digital-to-analog converters (VDACs), and current output digital-to-analog converters (IDACs). The ADC signal chain contains four transimpedance amplifier inputs (TIAs), 17 external voltage inputs, nine VDAC monitor channels, 11 IDAC monitor channels, a precharge buffer, and a 1 MSPS successive approximation register (SAR) ADC. The TIAs convert an input current to voltage and use an internal 2.5 V ADC reference for the positive terminal. The input multiplexer selects and configures either one of the channels (TIAx_OUT, AINx, IDACx, or VDACx) or one of the internal power monitor signals (AVDDx ? 3/8, IOVDD ? 3/8, PVDD_IDACx, or AGNDx) as an output to the SAR ADC input. These inputs are single-ended. AGNDx is used as the reference signal. An ADC sequencer option is also available to program an automatic channel measurement sequence (see the AD1018 Hardware Reference Manual for more information). The AD1018 provides 11 channels of low noise, low drift IDAC outputs with a full-scale range (0 mA to 20 mA or 0 mA to 50 mA for IDAC0 to IDAC6, and 0 mA to 150 mA or 0 mA to 200 mA for IDAC7 to IDAC10). Each IDAC channel has 16-bit resolution. The AD1018 has nine VDAC channels with 16-bit resolution. Each channel has a voltage output buffer. A 2.5 V on-chip reference buffer can drive a 100 nF capacitive load and maximum load current of 10 mA. This buffer is designed to bias an external thermal resistor. Use the 4-wire serial port interface (SPI) at up to 40 MHz to configure each block and to gather ADC data.APPLICATIONS Optical communication modules

The ADRF8800/ADRF8850 are low power, integrated systems on chip (SoC) that include a 2.4 GHz (industrial scientific medical) ISM band radio and an embedded microcontroller unit (MCU) subsystem.The ADRF8800/ADRF8850 provide wireless communications between the battery cell monitoring chip and the battery management system (BMS) controller. In the wireless battery management system (wBMS), the ADRF8800 nodes reside at the battery cells and take sensor data from the battery cell monitors. The nodes send the data over the air to an ADRF8850 network manager, and the manager provides the data to the BMS controller. The ADRF8850 network manager configures the network of nodes and manages the communications protocol.The embedded MCUs integrate static random access memory (SRAM), embedded flash memory, one-time programmable (OTP) memory, and an analog subsystem that provides clocking and reset.The ADRF8800/ADRF8850 has a rich set of peripherals, including serial peripheral interface (SPI), general-purpose input and output (GPIOs) ports, universal asynchronous receiver/transmitter (UART), and Joint Test Action Group (JTAG) port, as well as an analog-to-digital converter (ADC) and temperature sensor.The ADRF8800/ADRF8850 provide secure boot using software stored in read only memory (ROM) that authenticates the next boot stage using a hardware accelerated 256-bit elliptic curve cryptography (ECC-256) engine. Other hardware accelerated cryptographic features include the 128-bit advanced encryption standard (AES-128), 256-bit advanced encryption standard (AES-256), and Secure Hash Algorithm 256 (SHA-256). The ADRF8800/ADRF8850 have protected key storage with a root encrypted key generated on-chip that is only accessible to the on-chip hardware. The devices incorporate a true random number generator (TRNG) that is used to seed a National Institute of Standards and Technology (NIST) certified deterministic random bit generator (DRBG). The ADRF8800/ADRF8850 also include support for secure firmware updates with rollback protection. The in-field OTP memory is included to enforce the access control of debug ports and memory access once a device is ready for deployment.The ADRF8800/ADRF8850 feature on-chip, low dropout (LDO) regulators that allow the devices to be powered by a single 3.3 V nominal supply, provided by an external power management IC (PMIC) either stepping down from a high voltage bus or a 12 V battery.Each ADRF8800/ADRF8850 uses a single 40 MHz crystal to provide precision timing for the system.The ADRF8800/ADRF8850 are available in a 7 mm ? 7 mm body size, 48-lead LQFP_EP package, measuring 9 mm ? 9 mm when leads are included.APPLICATIONS Wireless Battery Management Systems

The AD7284 contains all the functions required for the general-purpose monitoring of stacked Li-Ion batteries, as used in hybrid electric vehicles and battery backup applications.The AD7284 has multiplexed cell voltage and auxiliary, analog-to-digital converter (ADC) measurement channels supporting four to eight cells of battery management. The device provides a maximum total unadjusted error, TUE, (cell voltage accuracy) of ?3 mV that includes all the internal errors from input to output. The primary ADC resolution is 14 bits.The AD7284 also includes an integrated secondary measurement path that validates the data on the primary ADC. Other diagnostic features include the detection of open inputs, communication, and power supply related faults.The AD7284 cell balancing interface outputs control the external field effect transistors (FETs) to allow discharging of individual cells.There are two on-chip 2.5 V voltage references: one reference for the primary measurement path, and one for the secondary measurement path.The AD7284 operates from one VDD supply, ranging from 10 V to 40 V. The device provides eight differential analog input channels to accommodate large common-mode signals across the full VDD range. Each channel allows an input signal range, VPINx ? VPIN(x ? 1) and VSINx ? VSIN(x ? 1), of 0 V to 5 V, where x = 0 to 8. The input pins assume a series stack of eight cells. The AD7284 includes four auxiliary ADC input channels that can be used for temperature measurement or system diagnostics.The AD7284 has a differential daisy-chain interface that allows multiple devices to be stacked without the need for individual device isolation. By design, this interface allows both device to device communication within the same module and communication between devices on different modules.Applications Li-Ion battery monitoring Electric and hybrid electric vehicles Stationary power applications

The AD74413R is a quad-channel software configurable input/output solution for building and process control applications. The AD74413R contains functionality for analog output, analog input, digital input, resistance temperature detector (RTD), and thermocouple measurements integrated into a single chip solution with a serial peripheral interface (SPI).The device features a 16-bit, ?-? analog-to-digital converter (ADC) and four configurable, 13-bit digital-to-analog converters (DACs) to provide four configurable input/output channels and a suite of diagnostic functions.?There are several modes related to the AD74413R. These modes are voltage output, current output, voltage input, externally powered current input, loop powered current input, external RTD measurement, digital input logic, and loop powered digital input.?The AD74413R contains a high accuracy 2.5 V internal reference to drive the DACs and the ADC.?Product Highlights Quad-Channel, Software Configurable Channels. Built In Diagnostics and Alert Features. Robust Architecture.?Applications? Process control Factory automation Motor drives Building control systems?

The ADF41020 frequency synthesizer can be used to implement local oscillators as high as 18 GHz in the up conversion and down conversion sections of wireless receivers and transmitters. It consists of a low noise, digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, and high frequency programmable feedback dividers (A, B, and P). A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). The synthesizer can be used to drive external microwave VCOs via an active loop filter. Its very high bandwidth means a frequency doubler stage can be eliminated, simplifying system architecture and reducing cost. The ADF41020 is software-compatible with the existing?ADF4106/ADF4107/ADF4108 family of devices from Analog Devices, Inc. Their pinouts match very closely with the exception of the ADF41020?s single-ended RF input pin, meaning only a minor layout change is required when updating current designs.Applications Microwave point-to-point/multipoint radios Wireless infrastructure VSAT radios Test equipment Instrumentation

The ADF4106 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise, digital phase frequency detector (PFD), a precision charge pump, a programmable reference divider, programmable A counter and B counter, and a dual-modulus prescaler (P/P + 1). The A (6-bit) counter and B (13-bit) counter, in conjunction with the dual-modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R Counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). Its very high bandwidth means that frequency doublers can be eliminated in many high frequency systems, simplifying system architecture and reducing cost.ADF4106-EP Supports defense and aerospace applications (AQEC standard).Applications Broadband wireless access Satellite systems Instrumentation Wireless LANS Base stations for wireless radios

The ADF4113HV is an integer-N frequency synthesizer with a high voltage charge pump (15 V). The synthesizer is designed for use with voltage controlled oscillators (VCOs) that have high tuning voltages (up to 15 V). Active loop filters are often used to achieve high tuning voltages, but the ADF4113HV charge pump can drive a high voltage VCO directly with a passive-loop filter. The ADF4113HV can be used to implement local oscillators in the upconversion and downconversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision high voltage charge pump, a programmable reference divider, programmable A and B counters, and a dual-modulus prescaler (P/P + 1).A simple 3-wire interface controls all of the on-chip registers. The devices operate with a power supply ranging from 2.7 V to 5.5 V and can be powered down when not in use.

The ADF4110 family of frequency synthesizers can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. They consist of low-noise digital PFD (Phase Frequency Detector), a precision charge pump, a programmable reference divider, programmable A and B counters and a dual modulus prescaler (P/P+1). The A (6-bit) and B (13-bit) counters, in conjunction with the dual modulus prescaler (P/P+1), implement an N divider (N = BP+A).In addition, the 14-bit reference counter (R Counter), allows selectable REFIN frequencies at the PFD input. A complete PLL (Phase-Locked Loop) can be implemented if the synthesizer is used with an external loop filter and VCO (Voltage Controlled Oscillator).Control of all the on-chip registers is via a simple 3-wire interface. The devices operate with a power supply ranging from 2.7 V to 5.5 V and can be powered down when not in use.

The ADF41513 is an ultralow noise frequency synthesizer that can be used to implement local oscillators (LOs) as high as 26.5 GHz in the upconversion and downconversion sections of wireless receivers and transmitters.The ADF41513 is designed on a high performance silicon geranium (SiGe), bipolar complementary metal-oxide semiconductor (BiCMOS) process, achieving a normalized phase noise floor of ?235 dBc/Hz. The phase frequency detector (PFD) operates up to 250 MHz (integer N mode)/125 MHz (fractional-N mode) for improved phase noise and spur performance. The variable modulus, ?-? modulator allows extremely fine resolution when using a 49-bit divide value. The ADF41513 can be used as an integer N phase-locked loop (PLL), or it can be used as a fractional-N PLL with either a fixed modulus for subhertz frequency resolution or variable modulus for subhertz exact frequency resolution.A complete PLL is implemented when the synthesizer is used with an external loop filter and voltage controlled oscillator (VCO). The 26.5 GHz bandwidth eliminates the need for a frequency doubler or divider stage, simplifying system architecture and reducing cost. The ADF41513 is packaged in a compact, 24-lead, 4 mm ? 4 mm LFCSPApplications Test equipment and instrumentation Wireless infrastructure Microwave point to point and multipoint radios Very small aperture terminal (VSAT) radios Aerospace and defense

The ADF4156 is a 6.2 GHz fractional-N frequency synthesizer that implements local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a ??? based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider (N = (INT + (FRAC/MOD))). The RF output phase is programmable for applications that require a particular phase relationship between the output and the reference. The ADF4156 also features cycle slip reduction circuitry, leading to faster lock times without the need for modifications to the loop filter.Control of all on-chip registers is via a simple 3-wire interface. The device operates with a power supply ranging from 2.7 V to 3.3 V and can be powered down when not in use.ApplicationsCATV equipmentBase stations for mobile radio (WiMAX, GSM, PCS, DCS, SuperCell 3G, CDMA, WCDMA)Wireless handsets (GSM, PCS, DCS, CDMA, WCDMA)Wireless LANs, PMRCommunications test equipment