The ADF7024 is an ultralow power, integrated transceiver for use in the license-free ISM bands at 433 MHz, 868 MHz, and 915 MHz. Its ease of use and high performance make it suitable for a wide variety of wireless applications. The ADF7024 is suitable for operation under the European ETSI EN 300-220 regulation, the North American FCC Part 15 regulation, and other similar regulatory standards.The ADF7024 can operate under a number of predefined radio profiles. For each radio profile, optimized register settings are provided for the ADF7024 radio. This ensures that the RF communication layer works seamlessly, allowing the user to concentrate on the protocol and system level design and prototyping. The radio profiles cover common data rate and modulation options. There are six radio profiles in total, as shown in Table 1.The ADF7024 operates with a power supply range of 2.2 V to 3.6 V and has very low power consumption in both Tx and Rx modes, enabling long lifetimes in battery-operated systems while maintaining excellent RF performance.The low IF receiver minimizes power consumption and provides excellent sensitivity. The receiver is exceptionally linear and, therefore, is very resilient to the presence of interferers in spectrally noisy environments. The highly efficient transmitter has programmable output power up to 13.5 dBm and automatic power amplifier (PA) ramping to meet transient spurious specifications. The RF synthesizer comprises a voltage controlled oscillator (VCO), a low noise fractional-N phase-locked loop (PLL) and a loop filter, all of which are fully integrated and automatically calibrated. This agile frequency synthesizer facilitates the implementation of frequency-hopping spread spectrum (FHSS) systems.The smart wake mode (SWM) allows the ADF7024 to wake up autonomously from sleep using the internal wake-up timer without intervention from the host processor. This functionality allows carrier sense, packet sniffing, and packet reception while the host processor is in sleep, thereby reducing overall system current consumption.The ADF7024 eases the processing burden of the host processor by integrating the lower layers of a typical communication protocol stack. The host processor can configure the ADF7024 using a simple command-based protocol over a standard 4-wire SPI interface. A single-byte command transitions the radio between states or performs a radio function.A complete wireless solution can be built using a small number of external discrete components and a host processor (typically a microcontroller).For more information, see the ADF7024 Hardware Reference Manual, UG-698, which is only available as part of the ADF7024 design resource package.APPLICATIONS Wireless sensor networks (WSNs) Home and building automation Asset tracking Process and building control Industrial control Internet of Things (IoT)

The ADG1634L is a monolithic industrial CMOS (iCMOS?) analog switch comprising four independently selectable single-pole, double-throw (SPDT) switches, respectively.All channels exhibit break-before-make switching action that prevents momentary shorting when switching channels. An EN input on the ADG1634L is used to enable or disable the device. When disabled, all channels are switched off. The switch is enabled with a Logic 1 EN input, while the INx input defines the state of the SPDT switch (see Table 12 in the data sheet).The ultralow on resistance and on-resistance flatness of the switch makes it an ideal solution for data acquisition and gain switching applications, where low distortion is critical. iCMOS construction ensures ultra low power dissipation, making the device ideally suited for portable and battery-powered instruments.An external VL supply provides flexibility for lower logic control. The ADG1634L is both 1.2 V and 1.8 V JEDEC standard compliant.APPLICATIONS Communication systems Medical systems Audio signal routing Video signal routing Automatic test equipment Data acquisition systems Battery-powered systems FPGA and microcontroller systems Sample-and-hold systems Relay replacementsPRODUCT HIGHLIGHTS 8.2 ? maximum on resistance over temperature. Minimum distortion. VL supply for low logic level compatibility. JEDEC standard compliant for both 1.2 V and 1.8 V logic levels. Guaranteed switch off when digital inputs are floating. 24-lead, 4 mm ? 4 mm LFCSP.

The ADG2128?is an analog cross point switch with an array size of 8 ? 12. The switch array is arranged so that there are eight columns by 12 rows, for a total of 96 switch channels. The array is bidirectional, and the rows and columns can be configured as either inputs or outputs. Each of the 96 switches can be addressed and configured through the I2C compatible interface. Standard, full speed, and high speed (3.4 MHz) I2C interfaces are supported. Any simultaneous switch combination is allowed. An additional feature of the ADG2128 is that switches can be updated simultaneously, using the LDSW command. In addition, a RESET option allows all of the switch channels to be reset/off. At power-on, all switches are in the off condition. The device is packaged in a 32-lead, 5 mm ? 5 mm LFCSP_VQ.APPLICATIONS AV switching in TV Automotive infotainment AV receivers CCTV Ultrasound applications KVM switching Telecom applications Test equipment/instrumentation PBX systems

The ADG772 is a low voltage CMOS device that contains two independently selectable single-pole, double throw (SPDT) switches. It is designed as a general-purpose switch and can be used for routing both USB 1.1 and USB 2.0 signals.This device offers a data rate of 1260 Mbps, making the part suitable for high frequency data switching. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. The ADG772 exhibits break-before-make switching action.The ADG772 is available in a 12-lead LFCSP and a 10-lead mini LFCSP. These packages make the ADG772 the ideal solution for space-constrained applications.Product Highlights 1.6 mm ? 1.3 mm mini LFCSP package. USB 1.1 (12 Mbps) and USB 2.0 (480 Mbps) compliant. Single 2.7 V to 3.6 V operation. 1.8 V logic compatible. RoHS compliant. Applications USB 2.0 signal switching circuits Cellular phones PDAs MP3 players Battery-powered systems Headphone switching Audio and video signal routing Communications systems

The ADGM1001/ADGM1002/ADGM1003 is a wideband, single-pole, two-throw (SP2T) switch, fabricated using Analog Devices, Inc., micro-electromechanical system (MEMS) switch technology. This technology enables a small form factor, wide RF bandwidth, highly linear, low insertion loss switch that is operational down to 0 Hz/dc, making it an ideal solution for a wide range of RF and precision equipment switching needs. The device is packaged in a 24-lead, 5.00 mm ? 4.00 mm ? 0.90 mm, land grid array (LGA) package.An integrated control chip generates the high voltage necessary to electrostatically actuate the switch via a complementary metal-oxide semiconductor (CMOS)-/low voltage transistor-transistor logic (LVTTL)-compatible parallel interface. All switches are independently controllable.Multifunction pin names may be referenced by their relevant function only. ADGM1001/ADGM1002/ADGM1003 Key Specifications Model Bandwidth Maximum RF Power (dBm) DC Signal Range (V) Maximum DC Current (mA) ADGM1001 DC to 34 GHz 33 ?6 200 ADGM1002 DC to 20 GHz 30 ?5 150 ADGM1003? DC to 16 GHz 27 ?3 75 APPLICATIONS ATE load and probe boards DC and high speed loop back testing Relay replacements Reconfigurable filters and attenuators Military and microwave radios Cellular infrastructure: 5G mmWave Supports digital standards: PCIe Gen4/Gen5/Gen6, USB 3 and USB 4, and PAM 4

The ADGS1208/ADGS1209 are analog multiplexers comprisingeight single channels and four differential channels, respectively. Aserial peripheral interface (SPI) controls the switches. The SPIinterface has robust error detection features, such as cyclicredundancy check (CRC) error detection, invalid read/writeaddress detection, and SCLK count error detection.It is possible to daisy-chain multiple ADGS1208/ADGS1209devices together. Daisy-chain mode enables the configuration ofmultiple devices with a minimal amount of digital lines. TheADGS1208/ADGS1209 can also operate in burst mode todecrease the time between SPI commands.iCMOS? construction ensures ultralow power dissipation,making the devices ideally suited for portable and batterypoweredinstruments.Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the suppliesare blocked. The ultralow on capacitance (CON) and exceptionally low chargeinjection (QINJ) of these multiplexers make them ideal solutionsfor data acquisition and sample-and-hold applications, wherelow glitch and fast settling are required.Product Highlights SPI interface removes the need for parallel conversion, logic traces and reduces GPIO channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC error detection, invalid read/write address detection, and SCLK count error detection ensures a robust digital interface. CRC and Error detection capabilities allows for the use of the ADGS1208/ADGS1209 in safety critical systems.Applications Audio and video routing Automatic test equipment Data-acquisition systems Battery-powered systems Sample-and-hold systems Communication systems

The ADGS1208/ADGS1209 are analog multiplexers comprisingeight single channels and four differential channels, respectively. Aserial peripheral interface (SPI) controls the switches. The SPIinterface has robust error detection features, such as cyclicredundancy check (CRC) error detection, invalid read/writeaddress detection, and SCLK count error detection.It is possible to daisy-chain multiple ADGS1208/ADGS1209devices together. Daisy-chain mode enables the configuration ofmultiple devices with a minimal amount of digital lines. TheADGS1208/ADGS1209 can also operate in burst mode todecrease the time between SPI commands.iCMOS? construction ensures ultralow power dissipation,making the devices ideally suited for portable and batterypoweredinstruments.Each switch conducts equally well in both directions when on,and each switch has an input signal range that extends to thesupplies. In the off condition, signal levels up to the suppliesare blocked. The ultralow on capacitance (CON) and exceptionally low chargeinjection (QINJ) of these multiplexers make them ideal solutionsfor data acquisition and sample-and-hold applications, wherelow glitch and fast settling are required.Product Highlights SPI interface removes the need for parallel conversion, logic traces and reduces GPIO channel count. Daisy-chain mode removes additional logic traces when multiple devices are used. CRC error detection, invalid read/write address detection, and SCLK count error detection ensures a robust digital interface. CRC and Error detection capabilities allows for the use of the ADGS1208/ADGS1209 in safety critical systems.Applications Audio and video routing Automatic test equipment Data-acquisition systems Battery-powered systems Sample-and-hold systems Communication systems

The ADIN1200 is a low power, single-port, 10 Mbps and 100 Mbps Ethernet transceiver with low latency specifications designedfor industrial Ethernet applications.This design integrates an energy efficient Ethernet (EEE) physical layer device (PHY) core with all associated common analog circuitry, input and output clock buffering, management interface and subsystem registers, and media access control (MAC) interface and control logic to manage the reset, clock control and pin configuration.The ADIN1200 is available in a 5 mm ? 5 mm, 32-lead leadframe chip scale package (LFCSP) and can operate with a single3.3 V supply, assuming the use of a 3.3 V MAC interface supply.For maximum flexibility in system level design, a separate VDDIOsupply enables the management data input/output (MDIO) andMAC interface supply voltages to be configured independentlyof the other circuitry on the ADIN1200 allowing operation at1.8 V, 2.5 V, or 3.3 V. At power-up, the ADIN1200 is held inhardware reset until each of the supplies has crossed its minimumrising threshold value and the power is considered good. Brownoutprotection is provided by monitoring the supplies to detect ifone or more of them drops below a minimum falling thresholdand holding the device in hardware reset until the power suppliesreturn and satisfy the power-on-reset (POR) circuit.The MII management interface (also referred to as MDIOinterface) provides a 2-wire serial interface between a hostprocessor or MAC and the ADIN1200, allowing access tocontrol and status information in the PHY core managementregisters. The interface is compatible with both IEEE? 802.3?Standard Clause 22 and Clause 45 management framestructures.The ADIN1200 can support cable lengths up to 180 meters.Note that throughout this data sheet, multifunction pins, such as XTAL_I/CLK_IN/REF_CLK, are referred to either by the entire pin name or by a single function of the pin, for example, XTAL_I, when only that function is relevant.Applications Industrial automation Process control Factory automation Robotics and motion Control Building automation Test and Measurement Industrial internet of things (IoT)

The ADIN1300 is a low power, single port, Gigabit Ethernet transceiver with low latency and power consumption specifications primarily designed for industrial Ethernet applications.This design integrates an energy efficient Ethernet (EEE) physical layer device (PHY) core with all associated common analog circuitry, input and output clock buffering, management interface and subsystem registers, and MAC interface and control logic to manage the reset and clock control and pin configuration.The ADIN1300 is available in a 6 mm ? 6 mm, 40-lead lead frame chip scale package (LFCSP). The device operates with a minimum of 2 power supplies, 0.9 V and 3.3 V, assuming the use of a 3.3 V MAC interface supply. For maximum flexibility in system level design, a separate VDDIO supply enables the management data input/output (MDIO) and MAC interface supply voltages to be configured independently of the other circuitry on the ADIN1300, allowing operation at 1.8 V, 2.5 V, or 3.3 V. At power-up, the ADIN1300 is held in hardware reset until each of the supplies has crossed its minimum rising threshold value. Brown-out protection is provided by monitoring the supplies to detect if one or more supply drops below a minimum falling threshold (see Table 17 on the datasheet), and holding the device in hardware reset until the power supplies return and satisfy the power-on reset (POR) circuit.The MII management interface (also referred to as MDIO interface) provides a 2-wire serial interface between a host processor or MAC (also known as management station (STA)) and the ADIN1300, allowing access to control and status information in the PHY core management registers. The interface is compatible with both the IEEE 802.3 Standard Clause 22 and Clause 45 management frame structures.The ADIN1300 can support cable lengths up to 150 meters at Gigabit speeds and 180 meters when operating at 100 Mbps or 10 Mbps.Applications Industrial automation Process control Factory automation Robotics/Motion Control Building automation Test and Measurement Industrial IoT

The ADM1063 is a configurable supervisory/sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1063 integrates a 12-bit ADC that can be used to accurately read back up to 12 separate voltages.The device also provides up to 10 programmable inputs for monitoring under, over, or out-of-window faults on up to 10 supplies. In addition, 10 programmable outputs can be used as logic enables. Six of these programmable outputs can provide up to a 12 V output for driving the gate of an n-FET that can be placed in the path of a supply.ApplicationsCentral office systems Servers/routers Multivoltage system line cards DSP/FPGA supply sequencing In-circuit testing of margined supplies

The ADM1066 Super Sequencer? is a configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple-supply systems. In addition to these functions, the ADM1066 integrates a 12-bit ADC and six 8-bit voltage output DACs. These circuits can be used to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or reference of a dc-to-dc converter using the DAC outputs. Supply margining can be performed with a minimum of external components. The margining loop can be used for in-circuit testing of a board during production (for example, to verify board functionality at ?5% of nominal supplies), or it can be used dynamically to accurately control the output voltage of a dc-to-dc converter.APPLICATIONS Central office systems Servers/routers Multivoltage system line cards DSP/FPGA supply sequencing In-circuit testing of margined supplies

The ADM1169 Super Sequencer? is a configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1169 integrates a 12-bit ADC and four 8-bit voltage output DACs. These circuits can be used to implement a closed-loop margining system that enables supply adjustment by altering either the feedback node or reference of a dc-to-dc converter using the DAC outputs. Supply margining can be performed with a minimum of external components. The margining loop can be used for in-circuit testing of a board during production (for example, to verify board functionality at ?5% of nominal supplies), or it can be used dynamically to accurately control the output voltage of a dc-to-dc converter. The device also provides up to eight programmable inputs for monitoring undervoltage faults, overvoltage faults, or out-of-window faults on up to eight supplies. In addition, there are eight programmable outputs that can be used as logic enables. Six of these programmable outputs can also provide up to a 12 V output for driving the gate of an N-FET that can be placed in the path of a supply. The logical core of the device is a sequencing engine (SE). This state machine-based construction provides up to 63 different states. This design enables very flexible sequencing of the outputs, based on the condition of the inputs. A block of nonvolatile EEPROM is available that can be used to store user-defined information and may also be used to hold a number of fault records that are written by the sequencing engine defined by the user when a particular fault or sequence occurs. The ADM1169 is controlled via configuration data that can be programmed into an EEPROM. The entire configuration can be programmed using an intuitive GUI-based software package provided by Analog Devices, Inc.

The ADM1170 is a Hot Swap controller that allows a board to be safely inserted and removed from a live backplane. This is achieved using a pass FET with a current control loop that monitors the input current using a sense resistor. An internal charge pump is used to enhance the gate of theexternal high side N-channel FET. When an over current condition is detected the gate voltage of the FET is reduced to limit the current flowing through the sense resistor. The ADM1170 operates with a supply voltage ranging from 2.7V to 16.5V. Using separate SENSE pins from VCC the ADM1170 allows for the hot swap of supplies ranging down to 1.6V. During an overcurrent condition the timer cap determines the amount of time the FET will remain in this condition. The ON (ON-CLR) pin is the enable input for the device and also acts as a latched fault reset for the ADM1170-2 model. The SS pin is used to control the inrush current profile by ramping up the current sense limit at a rate set by the SS capacitor. This device is available in two options: the ADM1170-1 will automatic retry for over-current fault and the ADM1170-2 will latch-off for an over-current fault. The ADM1170 is packaged in an 8-lead TSOT packageAPPLICATIONS Hot Swap Board Insertion ? Line Cards, Raid Systems Electronic Circuit Breaker Industrial High Side Switch/Circuit Breaker

The ADM1171 is a Hot Swap controller that allows a board to be safely inserted and removed from a live backplane. This is achieved using a pass FET with a current control loop that monitors the input current using a sense resistor. An internal charge pump is used to enhance the gate of theexternal high side N-channel FET. When an over current condition is detected the gate voltage of the FET is reduced to limit the current flowing through the sense resistor. The ADM1171 operates with a supply voltage ranging from 2.7V to 16.5V. During an overcurrent condition the timer capdetermines the amount of time the FET will remain in this condition. The ON (ON/CLR) pin is the enable input for the device and also acts as a latched fault reset for the ADM1171-2 model. The magnitude of the current flowing through the Sense resistor can be determined by the voltage on the CSOUT pin The SS pin allows the user to control the soft start profile of the current ramp at start-up via an external capacitor. This device is available in two options: the ADM1171-1 will automatic retry for over-current fault and the ADM1171-2 will latch-off for an over-current fault. The ADM1171 is packaged in an 8-lead TSOT package.APPLICATIONS Hot Swap Board Insertion ? Line Cards, Raid systems Electronic Circuit Breaker Industrial High Side Switch/Circuit Breaker

The ADM1178 is an integrated hot swap controller and current sense amplifier that offers digital current and voltage monitoring via an on-chip 12-bit analog-to-digital converter (ADC), communicated through an I2C? interface.An internal current sense amplifier measures voltage across the sense resistor in the power path via the VCC pin and the SENSE pin.The ADM1178 limits the current through this resistor by control-ling the gate voltage (via the GATE pin) of an external N-channel FET in the power path. The voltage across the sense resistor (and therefore the inrush current) is kept below a preset maximum.The ADM1178 protects the external FET by limiting the time that the maximum current runs through it. This current limit period is set by the value of the capacitor attached to the TIMER pin. Additionally, the device provides protection from overcurrent events that may occur after the hot swap event is complete. In case of a short-circuit event, the current in the sense resistor exceeds an overcurrent trip threshold, and the FET is switched off immediately by pulling down the GATE pin.A 12-bit ADC can measure the current seen in the sense resistor, as well as the supply voltage on the VCC pin. An alert output can be set to trigger when the ADC current reading exceeds a programmed overcurrent limit threshold.An industry-standard I2C interface allows a controller to read current and voltage data from the ADC. Measurements can be initiated by an I2C command. Alternatively, the ADC can run continuously, and the user can read the latest conversion data whenever it is required. Up to four unique I2C addresses can be created, depending on how the ADR pin is connected.The ADM1178 is packaged in a 10-lead MSOP.ApplicationsPower monitoring/power budgeting Central office equipment Telecommunication and data communication equipment PCs/servers

The ADM1184 is an integrated, 4-channel voltage-monitoring device. A 2.7 V to 5.5 V power supply is required on the VCC pin to power the device.Four precision comparators monitor four voltage rails. Each comparator has a 0.6 V reference with a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the trip points for the monitored supply rails.The ADM1184 has four open-drain outputs. Of these outputs, OUT1 to OUT3 can be used to enable power supplies, and PWRGD is a common power-good output indicating that all monitored supplies are above their respective thresholds.OUT1 to OUT3 are dependent on their associated VINx input (that is, VIN1, VIN2, or VIN3). If a supply monitored by VINx drops below its programmed threshold, the associated OUTx pin and PWRGD are disabled.PWRGD is a common power-good output indicating the status of all monitored supplies. There is an internal 190 ms (typical) delay associated with the assertion of the PWRGD output. If VIN1, VIN2, VIN3, or VIN4 drops below its programmed threshold, PWRGD is deasserted immediately.The ADM1184 is available in a 10-lead mini small outline package (MSOP).APPLICATIONS Monitor and alarm functions Telecommunications Microprocessor systems PC/servers

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADM1186-1 and ADM1186-2 are integrated, four-channel, voltage monitoring and sequencing devices. A 2.7 V to 5.5 V power supply is required on the VCC pin for power.Four precision comparators monitor four voltage rails, with all comparators sharing a 0.6 V reference and a worst-case accuracy of 0.8%. Resistor networks that are external to the VIN1, VIN2, VIN3, and VIN4 pins set the Under Voltage (UV) trip points for the monitored supply rails.The ADM1186-1 and ADM1186-2 have four open drain enable outputs, OUTx, that are used to enable power supplies. An open drain power good output, PWRGD, is provided that indicatesthe four VINx inputs are above their UV thresholds.A state machine monitors the state of the UP and?DOWN pins on the ADM1186-1 or the UP/overbar: DOWN pin on the ADM1186-2 to control the supply sequencing direction. In the ?Wait Start?state, a rising edge transition on the UP or UP/DOWN pin triggers a power-up sequence. A falling edge transition on the DOWN or UP/DOWN pin in the ?Power Up Done? statetriggers a power down sequence.During a power up sequence, the state machine enables each power supply in turn. The supply output voltage is monitored to determine if it rises above the UV threshold level within a userdefined duration called the blanking time. If a supply rises above the UV threshold then the next enable output in the sequence is turned on. In addition to the blanking time a user may also define sequencing time delays between each enable output turning on. When all four enable outputs are on, and the four VINx pins are above their UV trip points the power up sequence is complete. The ADM1186-1 provides an open drain pin, SEQ_DONE, that is asserted high to provide an indication that an up sequence is complete. The SEQ_DONE pins is allows multiple cascadedADM1186-1 devices to be perform controlled power up and down sequences. During a power down sequence the enable outputs turn off inreverse order. The sequence time delays between successive supplies the same as during the power up sequence, and no blanking time is used during a power down sequence. At the end of a down sequence the SEQ_DONE pin is brought low. During sequencing and when powered up, the state machine continuously monitors for any fault conditions. Faults include a UV condition on any of the inputs, or an unexpected controlinput. Any fault that occurs causes the state machine to enter a fault handler. This immediately turns off all enable outputs, and ensures that the device is ready to start a new up sequence. The ADM1186-1 has a bi-directional open drain pin, FAULT, that facilitates fault handling when using multiple devices. An ADM1186-1 experiencing a fault condition drives the FAULT pin low, causing other connected ADM1186-1devices to enter their own fault handling state.The ADM1186-1 is available in a 20-lead QSOP package andthe ADM1186-2 is available in a 16-lead QSOP package.

The ADM1192 is an integrated current sense amplifier that offers digital current and voltage monitoring via an on-chip, 12-bit analog-to-digital converter (ADC), communicated through an I2C interface.An internal current sense amplifier senses voltage across the sense resistor in the power path via the VCC pin and the SENSE pin.A 12-bit ADC can measure the current seen in the sense resistor and in the supply voltage on the VCC pin. An industry-standard I2C interface allows a controller to read current and voltage data from the ADC. Measurements can be initiated by an I2C command. Alternatively, the ADC can run continuously, and the user can read the latest conversion data whenever it is required. Up to four unique I2C addresses can be created, depending on the way the ADR pin is connected.A SETV pin is also included. A voltage applied to this pin is internally compared to the output voltage on the current sense amplifier. The output of the SETV comparator asserts when the current sense amplifier output exceeds the SETV voltage. This event is detected at the ALERT block. The ALERT block then charges up the external TIMER capacitor with a fixed current. When this timing cycle is complete, the ALERT output asserts.The ALERT output can be used as a flag to warn a micro-controller or field programmable gate array (FPGA) of an overcurrent condition. ALERT outputs of multiple ADM1192 devices can be tied together and used as a combined alert.A basic P-channel FET hot swap circuit can be implemented with the ALERT output. The value of the TIMER capacitor should be set so that the charging time of this capacitor is much longer than the period where a higher than nominal inrush current may be flowing.The ADM1192 is packaged in a 10-lead MSOP.APPLICATIONS Power monitoring/power budgeting Central office equipment Telecommunication and data communication equipment PCs/servers

The ADM1293 and ADM1294 are high accuracy integrated digital power monitors that offer digital current, voltage, and power monitoring using an on-chip, 12-bit analog-to-digital converter (ADC), communicated through a PMBus? compliant I2C interface.These devices acquire the current by measuring the voltage difference across the external sense resistor. This voltage is amplified and digitized by an internal 12-bit ADC. The same ADC can also sample the primary input voltage and an auxiliary input voltage. The internal digital block can perform multiplication of the current and primary input voltage for power calculation. The ADM1293/ADM1294 also feature a power accumulator for energy metering. An industry-standard PMBus interface allows a master controller to read back these data from the device. The master controller can then combine this information with a known sense resistor value to calculate the current, voltage, power, and energy consumption over time on the monitored rail.In conditions such as overcurrent, overvoltage, undervoltage, and overpower, the ADM1293/ADM1294 devices can generate an interrupt signal to the microprocessor through the GPOx/ALERTx outputs. The threshold for these conditions is digitally programmed via PMBus.The ADM1293 is designed for high-side supply monitoring with a voltage monitoring range from 0 V to 20 V. The ADM1294 is designed for low-side supply monitoring. Its integrated shunt regulator allows it to be powered and to monitor supply in wide voltage ranges.The ADM1293/ADM1294 are available in 4 mm ? 4 mm 16-lead LFCSP and 14-lead TSSOP packages with a specified operating ambient temperature range from ?40?C to +105?C for the ADM1293 and an operating junction temperature range from ?40?C to +105?C for the ADM1294.Applications Power monitoring/power budgeting Central office equipment Telecommunications and data communications equipment PCs/servers