The ADCMP580/ADCMP581/ADCMP582 are ultrafast voltagecomparators fabricated on the Analog Devices, Inc. proprietaryXFCB3 Silicon Germanium (SiGe) bipolar process. TheADCMP580 features CML output drivers, the ADCMP581features reduced swing ECL (negative ECL) output drivers, andthe ADCMP582 features reduced swing PECL (positive ECL)output drivers.All three comparators offer 180 ps propagation delay and 100 psminimum pulse width for 10 Gbps operation with 200 fs randomjitter (RJ). Overdrive and slew rate dispersion are typically lessthan 15 ps.The ?5 V power supplies enable a wide ?2 V to +3 V inputrange with logic levels referenced to the CML/NECL/PECLoutputs. The inputs have 50 ? on-chip termination resistorswith the optional capability to be left open (on an individualpin basis) for applications requiring high impedance input. The CML output stage is designed to directly drive 400 mV into50 ? transmission lines terminated to ground. The NECL outputstages are designed to directly drive 400 mV into 50 ? terminatedto ?2 V. The PECL output stages are designed to directly drive400 mV into 50 ? terminated to VCCO ? 2 V. High speed latchand programmable hysteresis are also provided. The differentiallatch input controls are also 50 ? terminated to an independentVTT pin to interface to either CML or ECL or to PECL logic.The ADCMP580/ADCMP581/ADCMP582 are available in a16-lead LFCSP.Applications Automatic test equipment (ATE) High speed instrumentation Pulse spectroscopy Medical imaging and diagnostics High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Clock and data signal restoration

The ADCMP600, ADCMP601, and ADCMP602 are very fast comparators fabricated on Analog Devices? proprietary XFCB2 process. These comparators are exceptionally versatile and easy to use. Features include an input range from ? 0.5 V to VCC + 0.2 V, low noise TTL-/CMOS-compatible output drivers, and latch inputs with adjustable hysteresis and/or shutdown inputs.The devices offer 5 ns propagation delay with 10 mV overdrive on 3 mA typical supply current.A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a ?0.5 V to +2.8 V input signal range up to a +5.5 V positive supply with a ?0.5 V to +5.8 V input signal range. Split input/output supplies with no sequencing restrictions on the ADCMP602 support a wide input signal range while still allowing independent output swing control and power savings.The TTL-/CMOS-compatible output stage is designed to drive up to 5 pF with full timing specs and to degrade in a graceful and linear fashion as additional capacitance is added. The comparator input stage offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. High speed latch and programmable hysteresis features are also provided with a unique single-pin control option.The ADCMP600 is available in both 5-lead SC70 and SOT-23 packages, the ADCMP601 is available in a 6-lead SC70 package, and the ADCMP602 is available in 8-lead MSOP and LSCFP packages.Applications High Speed Instrumentation Clock and Data Signal Restoration Logic Level Shifting or Translation Pulse Spectroscopy High Speed Line Receivers Threshold Detection Peak and Zero-crossing Detectors High Speed Trigger Circuitry Pulse-width Modulators Current-/voltage-controlled Oscillators Automatic Test Equipment (ATE)

The ADCMP609 is a fast comparator fabricated on XFCB2, an Analog Devices, Inc., proprietary process. These comparators are exceptionally versatile and easy to use. Features include an input range from VEE ? 0.2 V to VCC + 0.2 V, low noise, TTL-/CMOS-compatible output drivers, and adjustable hysteresis and/or shutdown inputs.The device offers 40 ns propagation delay driving a 15 pF load with 10 mV overdrive on 500 ?A typical supply current.A flexible power supply scheme allows the devices to operate with a single +2.5 V positive supply and a ?0.2 V to +3.0 V input signal range up to a +5.5 V positive supply with a ?0.2 V to +5.7 V input signal range.The TTL-/CMOS-compatible output stage is designed to drive up to 15 pF with full rated timing specifications and to degrade in a graceful and linear fashion as additional capacitance is added. The input stage of the comparator offers robust protection against large input overdrive, and the outputs do not phase reverse when the valid input signal range is exceeded. A programmable hysteresis feature is also provided.The ADCMP609, available in an 8-lead MSOP package, features a shutdown pin and hysteresis control.ApplicationsHigh speed instrumentation Clock and data signal restoration Logic level shifting or translation High speed line receivers Threshold detection Peak and zero-crossing detectors High speed trigger circuitry Pulse-width modulators Current-/voltage-controlled oscillators Data Sheet, Rev. A, 8/07

The ADE7854A?/?ADE7858A?/?ADE7868A?/?ADE7878A are high accuracy, 3-phase electrical energy measurement ICs with serial interfaces and three flexible pulse outputs. The devices incorporate second-order ?-? analog-to-digital converters (ADCs), a digital integrator, reference circuitry, and all signal processing required to perform total (fundamental and harmonic) active, reactive (ADE7858A, ADE7868A, and ADE7878A), and apparent energy measurement and rms calculations.The ADE7878A can also perform fundamental-only active and reactive energy measurement and rms calculations. A fixed function digital signal processor (DSP) executes the signal processing. The DSP program is stored in the internal ROM memory.The ADE7854A / ADE7858A / ADE7868A / ADE7878A can measure active, reactive, and apparent energy in various 3-phase configurations, such as wye or delta services, with both three and four wires. Aside from regular rms measurements, which are updated every 8 kHz, these devices measure low ripple rms values, which are averaged internally and updated every 1.024 sec. The devices provide system calibration features for each phase, that is, rms offset correction, phase calibration, and gain calibration.The CF1, CF2, and CF3 logic outputs provide a wide selection of power information. All four devices provide total active and apparent powers, as well as the sum of the current rms values; the ADE7858A, ADE7868A, and ADE7878A also provide total reactive powers; the ADE7878A also provides fundamental active and reactive powers.The ADE7854A / ADE7858A / ADE7868A / ADE7878A contain waveform sampling registers that allow access to all ADC outputs. The devices also incorporate power quality measurements, such as short duration low or high voltage detection, short duration high current variation, line voltage period measurement, and angles between phase voltages and currents.Two serial interfaces, serial peripheral interface (SPI) and I2C, can communicate with the devices. A dedicated high speed interface, the high speed data capture (HSDC) port, can be used in conjunction with I2C to provide access to the ADC outputs and real-time power information.The devices have two interrupt request pins, IRQ0 and IRQ1, to indicate that an enabled interrupt event has occurred. For the ADE7868A / ADE7878A, three specially designed low power modes ensure the continuity of energy accumulation when the ADE7868A / ADE7878A are in a tampering situation.

The ADE7880 is high accuracy, 3-phase electrical energy measurement IC with serial interfaces and three flexible pulse outputs. The ADE7880 device incorporates second-order sigma-delta (?-?) analog-to-digital converters (ADCs), a digital integrator, reference circuitry, and all of the signal processing required to perform the total (fundamental and harmonic) active, and apparent energy measurements, rms calculations, as well as fundamental-only active and reactive energy measurements. In addition, the ADE7880 computes the rms of harmonics on the phase and neutral currents and on the phase voltages, together with the active, reactive, and apparent power, and the power factor and harmonic distortion on each harmonic for all phases. Total harmonic distortion plus noise (THD + N) is computed for all currents and voltages. A fixed function digital signal processor (DSP) executes this signal processing. The DSP program is stored in the internal ROM memory.The ADE7880 is suitable for measuring active, reactive, and apparent energy in various 3-phase configurations, such as wye or delta services with both three and four wires. The ADE7880 provides system calibration features for each phase, that is, rms offset correction, phase calibration, and gain calibration. The CF1, CF2, and CF3 logic outputs provide a wide choice of power information: total active powers, apparent powers, or the sum of the current rms values, and fundamental active and reactive powers.The ADE7880 contains waveform sample registers that allow access to all ADC outputs. The devices also incorporate power quality measurements, such as short duration low or high voltage detections, short duration high current variations, line voltage period measurement, and angles between phase voltages and currents. Two serial interfaces, SPI and I2C, can be used to communicate with the ADE7880. A dedicated high speed interface, the high speed data capture (HSDC) port, can be used in conjunction with I2C to provide access to the ADC outputs and real-time power information. The ADE7880 also has two interrupt request pins, IRQ0 and IRQ1, to indicate that an enabled interrupt event has occurred. Three specially designed low power modes ensure the continuity of energy accumulation when the ADE7880 is in a tampering situation. The ADE7880 is available in the 40-lead LFCSP, Pb-free package, pin-for-pin compatible with ADE7854, ADE7858, ADE7868, and ADE7878?devices.APPLICATIONS Energy metering systems Power quality monitoring Solar inverters Process monitoring Protective devices

The ADE7953 is a high accuracy electrical energy measurementIC intended for single phase applications. It measures line voltageand current and calculates active, reactive, and apparent energy,as well as instantaneous rms voltage and current.The device incorporates three ?-? ADCs with a high accuracyenergy measurement core. The second input channel simultaneouslymeasures neutral current and enables tamper detectionand neutral current billing. The additional channel incorporatesa complete signal path that allows a full range of measurements.Each input channel supports independent and flexible gain stages,making the device suitable for use with a variety of current sensorssuch as current transformers (CTs) and low value shunt resistors.Two on-chip integrators facilitate the use of Rogowski coil sensors.The ADE7953 provides access to on-chip meter registers via avariety of communication interfaces including SPI, I2C, and UART.Two configurable low jitter pulse output pins provide outputs thatare proportional to active, reactive, or apparent energy, as well ascurrent and voltage rms. A full range of power quality informationsuch as overcurrent, overvoltage, peak, and sag detection areaccessible via the external IRQ pin. Independent active, reactive,and apparent no-load detections are included to prevent ?metercreep.? Dedicated reverse power (REVP), zero-crossing voltage(ZX), and zero-crossing current (ZX_I) pins are also provided. TheADE7953 energy metering IC operates from a 3.3 V supply voltageand is available in a 28-lead LFCSP package.

The ADF4150HV is a 3.0 GHz, fractional-N or integer-N frequency synthesizer with an integrated high voltage charge pump. The synthesizer can be used to drive external wideband VCOs directly, eliminating the need for operational amplifiers to achieve higher tuning voltages. This simplifies design and reduces cost while improving phase noise, in contrast to active filter topologies, which tend to degrade phase noise compared to passive filter topologies.The VCO frequency can be divided by 1, 2, 4, 8, or 16 to allow the user to generate RF output frequencies as low as 31.25 MHz. For applications that require isolation, the RF output stage can be muted. The mute function is both pin- and software-controllable.A simple 3-wire interface controls all on-chip registers. The charge pump operates from a power supply ranging from 6 V to 30 V, whereas the rest of the device operates from 3.0 V to 3.6 V. The ADF4150HV can be powered down when not in use.Applications Wireless infrastructure Microwave point-to-point/point-to-multipoint radios VSAT radios Test equipment Private/land mobile radio

The ADF4151 allows implementation of fractional-N or integer-N phase-locked loop (PLL) frequency synthesizers if used with an external voltage controlled oscillator (VCO), loop filter, and external reference frequency.The ADF4151 is used with external VCO parts and is footprint and software compatible with the ADF4350. The part consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a ?-? based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registers define an overall N divider [N = (INT + (FRAC/MOD))]. The RF output phase is programmable for applications that require a particular phase relationship between the output and the reference. The ADF4151 also features cycle slip reduction circuitry, leading to faster lock times without the need for modifications to the loop filter.Control of all the on-chip registers is through a simple 3-wire interface. The device operates with a power supply ranging from 3.0 V to 3.6 V that can be powered down when not in use.The ADF4151 is available in a 5 mm ? 5 mm package.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMax, GSM, PCS, DCS, DECT) Test equipment Wireless LANs, CATV equipment Clock generation

The ADF4154 is a fractional-N frequency synthesizer that implements local oscillators in the up conversion and down conversion sections of wireless receivers and transmitters. It consists of a low noise digital phase frequency detector (PFD), a precision charge pump, and a programmable reference divider. There is a ?-? based fractional interpolator to allow programmable fractional-N division. The INT, FRAC, and MOD registersdefine an overall N divider (N = (INT + (FRAC/MOD))). In addition, the 4-bit reference counter (R counter) allows selectable REFIN frequencies at the PFD input. A complete phase-locked loop (PLL) can be implemented if the synthesizer is used with an external loop filter and a voltage controlled oscillator (VCO).A key feature of the ADF4154 is the fast-lock mode with a builtintimer. The user can program a predetermined count-down time value so that the PLL will remain in wide bandwidth mode, instead of having to control this time externally.Control of all on-chip registers is via a simple 3-wire interface. The device operates with a power supply ranging from 2.7 V to 3.3 V, and can be powered down when not in use.

The ADF4350 allows implementation of fractional-N orinteger-N phase-locked loop (PLL) frequency synthesizersif used with an external loop filter and external referencefrequency.The ADF4350 has an integrated voltage controlled oscillator(VCO) with a fundamental output frequency ranging from2200 MHz to 4400 MHz. In addition, divide-by-1/2/4/8 or 16circuits allow the user to generate RF output frequencies as lowas 137.5 MHz. For applications that require isolation, the RFoutput stage can be muted. The mute function is both pin- andsoftware-controllable. An auxiliary RF output is also available,which can be powered down if not in use.Control of all the on-chip registers is through a simple 3-wireinterface. The device operates with a power supply rangingfrom 3.0 V to 3.6 V and can be powered down when not in use.Applications Wireless infrastructure (W-CDMA, TD-SCDMA, WiMAX, GSM, PCS, DCS, DECT) Test equipment Wireless LANs, CATV equipment Clock generation

The ADF5001 prescaler is a low noise, low power, fixed RF divider block that can be used to divide down frequencies as high as 18 GHz to a lower frequency suitable for input into a PLL IC, such as the?ADF4156 or ADF4106. The ADF5001 provides a divide-by-4 function. The ADF5001 operates off a 3.3 V supply and has differential 100 ? RF outputs to allow direct interface to the differential RF inputs of PLLs such as the ADF4156 and ADF4106. ApplicationsPLL frequency range extenderPoint-to-point radios VSAT radios Communications test equipment

The ADF7012 is a low power FSK/GFSK/OOK/GOOK/ASK UHF transmitter designed for short-range devices (SRDs). The output power, output channels, deviation frequency, and modulation type are programmable by using four, 32-bit registers.The fractional-N PLL and VCO with external inductor enable the user to select any frequency in the 75 MHz to 1 GHz band. The fast lock times of the fractional-N PLL make the ADF7012 suitable in fast frequency hopping systems. The fine frequency deviations available and PLL phase noise performance facilitates narrow-band operation.There are five selectable modulation schemes: binary frequency shift keying (FSK), Gaussian frequency shift keying (GFSK), binary on-off keying (OOK), Gaussian on-off keying (GOOK), and amplitude shift keying (ASK). In the compensation register, the output can be moved in

The ADF7012 is a low power FSK/GFSK/OOK/GOOK/ASK UHF transmitter designed for short-range devices (SRDs). The output power, output channels, deviation frequency, and modulation type are programmable by using four, 32-bit registers.The fractional-N PLL and VCO with external inductor enable the user to select any frequency in the 75 MHz to 1 GHz band. The fast lock times of the fractional-N PLL make the ADF7012 suitable in fast frequency hopping systems. The fine frequency deviations available and PLL phase noise performance facilitates narrow-band operation.There are five selectable modulation schemes: binary frequency shift keying (FSK), Gaussian frequency shift keying (GFSK), binary on-off keying (OOK), Gaussian on-off keying (GOOK), and amplitude shift keying (ASK). In the compensation register, the output can be moved in

The ADF7021 is a low power, highly integrated 2FSK/3FSK/4FSK transceiver. It is designed to operate in the narrowband, license-free ISM bands and licensed bands in the 80 MHz to 650 MHz and 862 MHz to 940 MHz frequency ranges. It has both Gaussian and raised cosine data filtering options to improve spectral efficiency for narrowband applications.It is suitable for circuit applications targeted at European ETSI-EN 300-220, the Japanese ARIB STD-T67, the Chinese Short Range Device regulations, and the North American FCC Part 15, Part 90, and Part 95 regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7021 very suitable for price-sensitive and area-sensitive applications.The transmit section contains a voltage controlled oscillator (VCO) and a low noise fractional-N PLL with output resolution of

The ADF7021 is a low power, highly integrated 2FSK/3FSK/4FSK transceiver. It is designed to operate in the narrowband, license-free ISM bands and licensed bands in the 80 MHz to 650 MHz and 862 MHz to 940 MHz frequency ranges. It has both Gaussian and raised cosine data filtering options to improve spectral efficiency for narrowband applications.It is suitable for circuit applications targeted at European ETSI-EN 300-220, the Japanese ARIB STD-T67, the Chinese Short Range Device regulations, and the North American FCC Part 15, Part 90, and Part 95 regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7021 very suitable for price-sensitive and area-sensitive applications.The transmit section contains a voltage controlled oscillator (VCO) and a low noise fractional-N PLL with output resolution of

The ADF7021-N is a high performance, low power, narrow-band transceiver based on the ADF7021. The ADF7021-N has IF filter bandwidths of 9 kHz, 13.5 kHz, and 18.5 kHz, making it ideally suited to worldwide narrowband standards and particularly those that stipulate 12.5 kHz channel separation. It is designed to operate in the narrow-band, license-free ISM bands and in the licensed bands with frequency ranges of 80 MHz to 650 MHz and 842 MHz to 916 MHz. The part has both Gaussian and raised cosine transmit data filtering options to improve spectral efficiency for narrow-band applications. It is suitable for circuit applications targeted at the Japanese ARIB STD-T67, the European ETSI EN 300 220, the Korean short range device regulations, the Chinese short range device regulations, and the North American FCC Part 15, Part 90, and Part 95 regulatory standards. A complete transceiver can be built using a small number of external discrete components, making the ADF7021-N very suitable for price-sensitive and area-sensitive applications. The range of on-chip FSK modulation and data filtering options allows users greater flexibility in their choice of modulation schemes while meeting the tight spectral efficiency requirements. The ADF7021-N also supports protocols that dynamically switch among 2FSK, 3FSK, and 4FSK to maximize communica-tion range and data throughput. The transmit section contains two voltage controlled oscillators (VCOs) and a low noise fractional-N PLL with an output resolution of The frequency-agile PLL allows the ADF7021-N to be used in frequency-hopping, spread spectrum (FHSS) systems. Both VCOs operate at twice the fundamental frequency to reduce spurious emissions and frequency pulling problems. The transmitter output power is programmable in 63 steps from ?16 dBm to +13 dBm and has an automatic power ramp control to prevent spectral splatter and help meet regulatory standards. The transceiver RF frequency, channel spacing, and modulation are programmable using a simple 3-wire interface. The device operates with a power supply range of 2.3 V to 3.6 V and can be powered down when not in use. A low IF architecture is used in the receiver (100 kHz), which minimizes power consumption and the external component count yet avoids dc offset and flicker noise at low frequencies. The IF filter has programmable bandwidths of 9 kHz, 13.5 kHz, and 18.5 kHz. The ADF7021-N supports a wide variety of pro-grammable features including Rx linearity, sensitivity, and IF bandwidth, allowing the user to trade off receiver sensitivity and selectivity against current consumption, depending on the application. The receiver also features a patent-pending automatic frequency control (AFC) loop with programmable pull-in range that allows the PLL to track out the frequency error in the incoming signal. The receiver achieves an image rejection performance of 56 dB using a patent-pending IR calibration scheme that does not require the use of an external RF source. An on-chip ADC provides readback of the integrated tempera-ture sensor, external analog input, battery voltage, and RSSI signal, which provides savings on an ADC in some applications. The temperature sensor is accurate to ?10?C over the full oper-ating temperature range of ?40?C to +85?C. This accuracy can be improved by performing a 1-point calibration at room temperature and storing the result in memory.

The ADF7021-V is a high performance, low power, narrow-band RF transceiver based on the ADF7021-N. The architecture of the ADF7021-V transceiver is similar to that of the ADF7021-N except that an external VCO is used by the on-chip RF synthesizer for applications that require improved phase noise performance.The ADF7021-V is designed to operate in both the license-free ISM bands and in the licensed bands from 80 MHz to 960 MHz.To minimize RF feedthrough and spurious emissions, the external VCO operates at 2? or 4? the desired RF frequency; the ADF7021-V supports a maximum VCO frequency operation of 1920 MHz. The 4? VCO operation is programmable by enabling an additional on-chip divide-by-2 outside the RF synthesizer loop and offers improved phase noise performance.As with the ADF7021-N receiver, the IF filter bandwidths of 9 kHz, 13.5 kHz, and 18.5 kHz are supported, making the ADF7021-V ideally suited to worldwide narrow-band telemetry applications.The part has both Gaussian and raised cosine transmit data filtering options to improve spectral efficiency for narrow-band applications. It is suitable for circuit applications targeted at the following: European ETSI EN 300 220 North American FCC Part 15, Part 90, and Part 95 Japanese ARIB STD-T67 Korean short-range device regulations Chinese short-range device regulationsA complete transceiver can be built using a small number of discrete external components, making the ADF7021-V very suitable for area-sensitive, high performance driven applications.See data sheet for more information.APPLICATIONS Narrow-band, short range device (SRD) standards ETSI EN 300 220 FCC Part 90 (meets Emission Mask D requirements) FCC Part 95 ARIB STD-T67 Wireless Metering Narrow-band wireless telemetry

The ADF7023-J is a very low power, high performance, highly integrated 2FSK/GFSK/MSK/GMSK transceiver designed for operation in the 902 MHz to 958 MHz frequency band, which covers the ARIB Standard T96 band at 950 MHz. Data rates from 1 kbps to 300 kbps are supported.The transmit RF synthesizer contains a VCO and a low noise fractional-N phase locked loop (PLL) with an output channel frequency resolution of 400 Hz. The VCO operates at twice the fundamental frequency to reduce spurious emissions. The receive and transmit synthesizer bandwidths are automatically, and independently, configured to achieve optimum phase noise, modulation quality, and settling time. The transmitter output power is programmable from ?20 dBm to +13.5 dBm, with automatic PA ramping to meet transient spurious specifications. The part possesses both single-ended and differential PAs, which allow for Tx antenna diversity.The receiver is exceptionally linear, achieving an IP3 specification of ?12.2 dBm and ?11.5 dBm at maximum gain and minimum gain, respectively, and an IP2 specification of 18.5 dBm and 27 dBm at maximum gain and minimum gain, respectively. The receiver achieves an interference blocking specification of 66 dB at a ?2 MHz offset and 74 dB at a ?10 MHz offset. Thus, the part is extremely resilient to the presence of interferers in spectrally noisy environments. The receiver features a novel, high speed, AFC loop, allowing the PLL to find and correct any RF frequency errors in the recovered packet. A patent pending image rejection calibration scheme is available by downloading the image rejection calibration firmware module to program RAM. The algorithm does not require the use of an external RF source nor does it require any user intervention once initiated. The results of the calibration can be stored in nonvolatile memory for use on subsequent power-ups of the transceiver.See data sheet for additional information.Applications Smart metering IEEE 802.15.4g Home automation Process and building control Home Energy Management Systems (HEMS) Wireless sensor networks (WSNs) Wireless healthcare