The ADF7023 is a very low power, high performance, highly integrated 2FSK/GFSK/OOK/MSK/GMSK transceiver designed for operation in the 862 MHz to 928 MHz and 431 MHz to 464 MHz frequency bands, which cover the worldwide license-free ISM bands at 433 MHz, 868 MHz, and 915 MHz. It is suitable for circuit applications that operate under the European ETSI EN300-220, the North American FCC (Part 15), the Chinese short-range wireless regulatory standards, or other similar regional standards. Data rates from 1 kbps to 300 kbps are supported.The transmit RF synthesizer contains a VCO and a low noise fractional-N PLL with an output channel frequency resolution of 400 Hz. The VCO operates at 2? or 4?, the fundamental frequency to reduce spurious emissions. The receive and transmit synthesizer bandwidths are automatically, and independently, configured to achieve optimum phase noise, modulation quality, and settling time. The transmitter output power is programmable from ?20 dBm to +13.5 dBm, with automatic PA ramping to meet transient spurious specifications. The part possesses both single-ended and differential PAs, which allows for Tx antenna diversity.The receiver is exceptionally linear, achieving an IP3 specification of ?12.2 dBm and ?11.5 dBm at maximum gain and minimum gain, respectively, and an IP2 specification of 18.5 dBm and 27 dBm at maximum gain and minimum gain, respectively. The receiver achieves an interference blocking specification of 66 dB at ?2 MHz offset and 74 dB at ?10 MHz offset. Thus, the part is extremely resilient to the presence of interferers in spectrally noisy environments. The receiver features a novel, high speed, automatic frequency control (AFC) loop, allowing the PLL to find and correct any RF frequency errors in the recovered packet.A patent pending, image rejection calibration scheme is available through a program download. The algorithm does not require the use of an external RF source nor does it require any user intervention once initiated. The results of the calibration can be stored in nonvolatile memory for use on subsequent power-ups of the transceiver.See data sheet for additional information.Applications Smart metering IEEE 802.15.4g Wireless MBUS Home automation Process and building control Wireless sensor networks (WSNs) Wireless healthcare

The ADPD103 is a highly efficient photometric front end with an integrated 14-bit analog-to-digital converter (ADC) and a 20-bit burst accumulator that works in concert with flexible light emitting diode (LED) drivers. It is designed to stimulate an LED and measure the corresponding optical return signal. The data output and functional configuration occur over a 1.8 V I2C interface. The control circuitry includes flexible LED signaling and synchronous detection. The analog front end (AFE) features best-in-class rejection of signal offset and corruption due to modulated interference commonlycaused by ambient light.Couple the ADPD103 with a low capacitance photodiode of

The ADuM3223/ADuM4223 are 4 A isolated, half-bridge gatedrivers that employ the Analog Devices, Inc., iCoupler? technology to provide independent and isolated high-side and low-sideoutputs. The ADuM3223 provides 3000 V rms isolation in thenarrow body, 16-lead SOIC package, and the ADuM4223 provides 5000 V rms isolation in the wide body, 16-lead SOIC package.Combining high speed CMOS and monolithic transformer technology, these isolation components provide outstanding performance characteristics superior to the alternatives, such as the combination of pulse transformers and gate drivers. The ADuM3223/ADuM4223 isolators each provide two independent isolated channels. They operate with an inputsupply ranging from 3.0 V to 5.5 V, providing compatibility with lower voltage systems. In comparison to gate drivers employinghigh voltage level translation methodologies, the ADuM3223/ADuM4223 offer the benefit of true, galvanic isolation between the input and each output. Each output may be continuously operated up to 537 V peak relative to the input, thereby supporting low-side switching to negative voltages. The differential voltagebetween the high-side and low-side may be as high as 800 V peak.As a result, the ADuM3223/ADuM4223 provide reliable controlover the switching characteristics of IGBT/MOSFET configurations over a wide range of positive or negative switching voltages.Applications Switching power supplies Isolated IGBT/MOSFET gate drives Industrial inverters Automotive

The ADXL362 is an ultralow power, 3-axis MEMS accelerometer that consumes less than 2 ?A at a 100 Hz output data rate and 270 nA when in motion triggered wake-up mode. Unlike accelerometers that use power duty cycling to achieve low power consumption, the ADXL362 does not alias input signals by undersampling; it samples the full bandwidth of the sensor at all data rates.The ADXL362 always provides 12-bit output resolution; 8-bit formatted data is also provided for more efficient single-byte transfers when a lower resolution is sufficient. Measurement ranges of ?2 g, ?4 g, and ?8 g are available, with a resolution of 1 mg/LSB on the ?2 g range. For applications where a noise level lower than the normal 550 ?g/?Hz of the ADXL362 is desired, either of two lower noise modes (down to 175 ?g/?Hz typical) can be selected at minimal increase in supply current.In addition to its ultralow power consumption, the ADXL362 has many features to enable true system level power reduction. It includes a deep multimode output FIFO, a built-in micropower temperature sensor, and several activity detection modes including adjustable threshold sleep and wake-up operation that can run as low as 270 nA at a 6 Hz (approximate) measurement rate. A pin output is provided to directly control an external switch when activity is detected, if desired. In addition, the ADXL362 has provisions for external control of sampling time and/or an external clock.The ADXL362 operates on a wide 1.6 V to 3.5 V supply range, and can interface, if necessary, to a host operating on a separate, lower supply voltage. The ADXL362 is available in a 3 mm ? 3.25 mm ? 1.06 mm package.APPLICATIONS Hearing aids Home healthcare devices Motion enabled power save switches Wireless sensors Motion enabled metering devices

Other Development Tools EVAL-SDP-CS1Z

The SSM2167 is a complete and flexible solution for conditioning microphone inputs in personal electronics and computer audio systems. It is also excellent for improving vocal clarity in com-munications and public address systems. A low noise voltage controlled amplifier (VCA) provides a gain that is dynamically adjusted by a control loop to maintain a set compression characteristic. The compression ratio is set by a single resistor and can be varied from 1:1 to over 10:1 relative to the fixed rotation point. Signals above the rotation point are limited to prevent overload and to eliminate popping. A downward expander (noise gate) prevents amplification of background noise or hum. This results in optimized signal levels prior to digitization, thereby eliminating the need for additional gain or attenuation in the digital domain. The flexibility of setting the compression ratio and the time constant of the level detector, coupled with two values of rotation point, make the SSM2167 easy to integrate in a wide variety of microphone conditioning applications.The device is available in a 10-lead MSOP package, and is guaranteed for operation over the extended industrial temperature range of ?40?C to +85?C.ApplicationsDesktop, portable, or palmtop computersTelephone conferencingCommunication headsetsTwo-way communicationsSurveillance systemsKaraoke and DJ mixers

The ADP5135 combines three high performance buck regulators. It is available in a 24-lead 4 mm ? 4 mm LFCSP.The high switching frequency of the buck regulators enables tiny multilayer external components and minimizes the board space. When the MODE pin is set to high, the buck regulators operate in forced PWM mode. When the MODE pin is set to low, the buck regulators operate in PWM mode only when the load is above a predefined threshold. When the load current falls below this predefined threshold, the regulator operates in power save mode (PSM), improving the light load efficiency.Buck1 and Buck2 operate in sync and Buck3 operates out of phase to reduce the input capacitor requirement. Regulators in the ADP5135 are activated through dedicated enable pins. The default output voltages can be externally set in the adjustable version, or factory programmable to a wide range of preset values in the fixed voltage version.Applications Power for processors, ASICS, FPGAs, and RF chipsets Portable instrumentation and medical devices Space constrained devices

The ADPA1105 is a gallium nitride (GaN), broadband power amplifier that delivers 46 dBm (40 W) with 60% typical power added efficiency (PAE) across a bandwidth of 0.9 GHz to 1.4 GHz. The ADPA1105 provides ?0.5 dB gain flatness across a bandwidth of 0.9 GHz to 1.4 GHz. The ADPA1105 is ideal for pulsed applications such as wireless infrastructure, radar, public mobile radio, and general-purpose amplifications. The ADPA1105 comes in a 32-lead, lead frame chip scale package, premolded cavity (LFCSP_CAV).APPLICATIONSWeather radarMarine radarMilitary radar

The ADPA1107 is a gallium nitride (GaN), broadband power amplifier, delivering 45.0 dBm (35 W) with 56.5% typical power added efficiency (PAE) across a bandwidth of 4.8 GHz to 6.0 GHz. The ADPA1107 provides ?0.5 dB gain flatness from 5.4 GHz to 6.0 GHz.The ADPA1107 is ideal for pulsed applications such as radar, public mobile radio, and general-purpose amplification.The ADPA1107 is housed in a 40-lead, 6 mm ? 6 mm, lead frame chip scale package (LFCSP).APPLICATIONSWeather radarsMarine radarsMilitary radars

ADPA7005AEHZThe ADPA7005 is a gallium arsenide (GaAs), pseudomorphic high electron mobility transfer (pHEMT), monolithic microwave integrated circuit (MMIC), 32 dBm saturated output power (PSAT), >1 W, power amplifier, with an integrated temperature compensated, on-chip power detector that operates between 18 GHz and 44 GHz. The ADPA7005 provides 15.5 dB of small signal gain and approximately 32 dBm of PSAT at 32 GHz from a 5 V supply (see Figure 26 in the data sheet). The ADPA7005 has an output IP3 of 40 dBm between 24 GHz to 34 GHz and is ideal for linear applications such as electronic countermeasure and instrumentation applications requiring >30 dBm of efficient PSAT. The RF input and outputs are internally matched and dc blocked for ease of integration into higher level assemblies. The ADPA7005 is packaged in a 7 mm ? 7 mm, 18?terminal ceramic leadless chip carrier with heat sink (LCC_HS) that exhibits low thermal resistance and is compatible with surface-mount manufacturing techniques.ADPA7005CHIPThe ADPA7005CHIP is a gallium arsenide (GaAs), pseudomorphic high electron mobility transistor (pHEMT), monolithic microwave integrated circuit (MMIC), distributed power amplifier that operates from 20 GHz to 44 GHz. The amplifier provides 17 dB of small signal gain, 31 dBm output power for 1 dB compression (P1dB), and a typical output third-order intercept (IP3) of 41 dBm. The ADPA7005CHIP requires 1200 mA from a 5 V supply on the supply voltage (VDD) and features inputs and outputs that are internally matched to 50 ?, facilitating integration into multichip modules (MCMs). All data is taken with the chip connected via two 0.025 mm wire bonds that are at least 0.31 mm long.Applications Military and space Test instrumentation Communications

The ADRF5047 is a reflective, single-pole, four-throw (SP4T) switch manufactured in the silicon process.The ADRF5047 operates from 9 kHz to 44 GHz with an insertion loss of lower than 2.7 dB and an isolation of higher than 31 dB. The device has a radio frequency (RF) input power handling capability of 26.5 dBm for both through path and hot switching.The ADRF5047 draws a low current of 3 ?A on the positive supply of +3.3 V, and ?110 ?A on the negative supply of ?3.3 V. The device provides complementary metal-oxide semiconductor (CMOS)-/low voltage transistor-transistor logic (LVTTL)-compatible controls.The ADRF5047 is pin-compatible with the ADRF5046 fast switching version, which operates from 100 MHz to 44 GHz.The ADRF5047 comes in a 20-terminal, 3 mm ? 3 mm, RoHS-compliant, land grid array (LGA) package and operates from ?40?C to +105?C.Applications Industrial scanner Test instrumentation Cellular infrastructure?mmWave 5G Military radios, radars, and electronic counter measures (ECMs) Microwave radios and very small aperture terminals (VSATs)

The ADRF5250 is a general-purpose, single-pole, five-throw (SP5T), nonreflective switch manufactured using a silicon process. The ADRF5250 is available in a 4 mm ? 4 mm, 24-lead lead frame chip scale package (LFCSP) and provides high isolation and low insertion loss from 100 MHz to 6 GHz.The ADRF5250 incorporates a negative voltage generator to operate with a single positive supply voltage from 3.3 V to 5 V applied to the VDD pin when the VSS pin is connected to ground. The negative voltage generator can be disabled when an external negative supply voltage of ?3.3 V is applied to the VSS pin. The ADRF5250 provides a 1.8 V logic-compatible, 3-pin control interface.Applications Cellular/4G infrastructure Wireless infrastructure Mobile radios Test equipment

The ADRF6650 is a highly integrated downconverter that integrates dual mixers, dual digital switched attenuators, dual digital variable gain amplifiers, a phase-locked loop (PLL), and voltage controlled oscillators (VCOs). In addition, the ADRF6650 integrates two radio frequency (RF) baluns, serial gain control (SGC) controls, and fast enable inputs for time division duplex (TDD) operation.The on-chip RF baluns enable the ADRF6650 to support 50 ? terminated RF inputs. The integrated passive mixer provides a highly linear downconversion for a 200 MHz, sliding, intermediate frequency (IF) window. The ADRF6650 uses broadband square wave limiting local oscillator (LO) amplifiers to achieve an RF bandwidth of 450 MHz to 2700 MHz. Unlike conventional narrow-band sine wave LO amplifier solutions, this amplifier permits the LO to be applied either above or below the RF input over an extremely wide bandwidth.The ADRF6650 offers two alternatives for generating the differential LO input signal: internally via the on-chip fractional-N synthesizer with low phase noise VCOs, or externally via a low phase noise LO signal. The integrated PLL/VCO enables continuous LO coverage from 450 MHz to 2900 MHz. The PLL referenceinput supports a wide frequency range and includes integrated reference dividers before the phase frequency detector (PFD).The ADRF6650 is fabricated using an advanced silicon-germanium (SiGe) bipolar complementary metal-oxide semiconductor(BiCMOS) process. It is available in a 56-lead, RoHS-compliant, 8 mm ? 8 mm, lead frame chip scale package (LFCSP) package with an exposed pad. Performance is specified over the ?40?C to +105?C maximum paddle temperature.Applications Multiband/multistandard cellular base station diversity receivers Wideband radio link diversity downconverters Multimode cellular extenders and picocells

The ADRF6780 is a silicon germanium (SiGe) design, wideband,microwave upconverter optimized for point to point microwaveradio designs operating in the 5.9 GHz to 23.6 GHz frequencyrange.The upconverter offers two modes of frequency translation. The device is capable of direct conversion to radio frequency (RF) from baseband I/Q input signals, as well as single sideband (SSB) upconversion from a real intermediate frequency (IF) input carrier frequency. The baseband inputs are high impedance and are generally terminated off chip with 100 ? differential back terminations. The baseband I/Q input path can be disabled and a modulated real IF signal anywhere from 0.8 GHz to 3.5 GHz can fed into the IF input path and upconverted to 5.9 GHz to 23.6 GHz while suppressing the unwanted sideband by typically better than 25 dBc. The serial port interface (SPI) allows tweaking of the quadrature phase adjustment to allow optimum sideband suppression. In addition, the SPI interface allows powering down the output power detector to reduce power consumption when power monitoring is not necessary.The ADRF6780 upconverter comes in a compact, thermallyenhanced, 5 mm ? 5 mm LFCSP package. The ADRF6780operates over the ?40?C to +85?C temperature range.APPLICATIONS Point to point microwave radios Radar, electronic warfare systems Instrumentation, automatic test equipment (ATE)

The ADRV9002 is a highly integrated RF transceiver that has dual-channel transmitters, dual-channel receivers, integrated synthesizers, and digital signal processing functions.The ADRV9002 is a high performance, highly linear, high dynamic range transceiver designed for performance vs. power consumption system optimization. The device is configurable and ideally suited to demanding, low power, portable and battery powered equipment. The ADRV9002 operates from 30 MHz to 6000 MHz and covers the UHF, VHF, industrial, scientific, and medical (ISM) bands, and cellular frequency bands in narrow-band (kHz) and wideband operation up to 40 MHz. The ADRV9002 is capable of both TDD and FDD operation.The transceiver consists of direct conversion signal paths with state-of-the-art noise figure and linearity. Each complete receiver and transmitter subsystem includes dc offset correction, quadrature error correction (QEC), and programmable digital filters, which eliminate the need for these functions in the digital baseband. In addition, several auxiliary functions, such as auxiliary analog-to-digital converters (ADCs), auxiliary digital-to-analog converters (DACs), and general-purpose inputs/outputs (GPIOs), are integrated to provide additional monitoring and control capability.The fully integrated phase-locked loops (PLLs) provide high performance, low power, fractional-N frequency synthesis for the transmitter, receiver, and clock sections. Careful design and layout techniques provide the isolation required in high performance personal radio applications. All voltage controlled oscillator (VCO) and loop filter components are integrated to minimize the external component count. The local oscillators (LOs) have flexible configuration options and include fast lock modes.The transceiver includes low power sleep and monitor modes to save power and extend the battery life of portable devices while monitoring communications.The fully integrated, low power digital predistortion (DPD) is optimized for both narrow-band and wideband signals and enables linearization of high efficiency power amplifiers.The ADRV9002 core can be powered directly from 1.0 V, 1.3 V, and 1.8 V regulators and is controlled via a standard 4-wire serial port. Other voltage supplies are used to provide proper digital interface levels and to optimize the receiver, transmitter, and auxiliary converter performance.High data rate and low data rate interfaces are supported using configurable CMOS or low voltage differential signaling (LVDS) serial synchronous interface (SSI) choice.The ADRV9002 is packaged in a 12 mm ? 12 mm, 196-ball chip scale package ball grid array (CSP_BGA).APPLICATIONS Mission critical communications Very high frequency (VHF), ultrahigh frequency (UHF), and cellular to 6 GHz Time division duplexing (TDD) and frequency division duplexing (FDD) applications

The receive path consists of two independent, wide bandwidth (BW), direct conversion receivers with state-of-the-art dynamic range. The complete receive subsystem includes automatic and manual attenuation control, dc offset correction, quadrature error correction (QEC), and digital filtering, eliminating the need for these functions in the digital baseband. RF front-end control and several auxiliary functions such as analog-to-digital converters (ADCs), digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) for the power amplifier (PA) are also integrated.In addition to automatic gain control (AGC), the ADRV9008-1 also features flexible external gain control modes, allowing significant flexibility in setting system level gain dynamically.The received signals are digitized with a set of four high dynamic range, continuous time, sigma-delta (?-?) ADCs that provide inherent antialiasing. The combination of the direct conversion architecture, which does not suffer from out of band image mixing, and the lack of aliasing relaxes the requirements of the RF filters compared to traditional intermediate frequency (IF) receivers.The fully integrated phase-locked loop (PLL) provides high per-formance, low power, fractional-N, RF synthesis for the receiver signal paths. An additional synthesizer generates the clocks needed for the converters, digital circuits, and the serial interface. A multi-chip synchronization mechanism synchronizes the phase of the RF local oscillator (LO) and baseband clocks between multiple ADRV9008-1 chips. Precautions are taken to provide the isolation required in high performance base station applications. All voltage controlled oscillators (VCOs) and loop filter components are integrated.The high speed JESD204B interface supports up to 12.288 Gbps lane rates, resulting in two lanes per transmitter and a single lane per receiver in the widest bandwidth mode. The interface also supports interleaved mode for lower bandwidths, reducing the total number of high speed data interface lanes to one. Both fixed and floating point data formats are supported. The floating point format allows internal AGC to be invisible to the demodulator device.The core of the ADRV9008-1 can be powered directly from 1.3 V and 1.8 V regulators and is controlled via a standard 4-wire serial port. Comprehensive power-down modes are included to mini-mize power consumption during normal use. The ADRV9008-1 is packaged in a 12 mm ? 12 mm, 196-ball chip scale ball grid array (CSP_BGA).Applications 3G, 4G, and 5G FDD, macrocell base stations Wide band active antenna systems Massive multiple input, multiple output (MIMO) Phased array radar Electronic warfare Military communications Portable test equipment

The ADTR1107 is a compact, 6 GHz to 18 GHz, front-end IC?with an integrated power amplifier, low noise amplifier (LNA), and a reflective single-pole double-throw (SPDT) switch. These?integrated features make the device ideal for phased array antenna and radar applications. The front-end IC offers 25 dBm of saturated output power (PSAT) and 22?dB small signal gain in?transmit state, and 18 dB small signal gain and 2.5 dB noise figure in receive state. The device has a directional coupler for power detection. The input/outputs (I/Os) are internally matched to 50 ?. The ADTR1107 is supplied in a 5 mm ? 5 mm, 24-terminal, land grid array (LGA) package.Applications Phased array antenna Military radar Weather radar Communication links Electronic warfare

The ADXL203 is a high precision, low power, complete dual-axis accelerometer with signal conditioned voltage outputs, all on a single, monolithic IC. The ADXL203 measures acceleration with a full-scale range of ?1.7 g, ?5 g, or ?18 g. The ADXL203 can measure both dynamic acceleration (for example, vibration) and static acceleration (for example, gravity).The typical noise floor is 110 ?g/?Hz, allowing signals below 1 mg (0.06? of inclination) to be resolved in tilt sensing applications using narrow bandwidths (

The Automotive Audio Bus? (A2B?) is an innovative technology that reduces system cost, weight, and design complexity by distributing audio and control data, together with clock and power over a single, low-cost, unshielded twisted pair cable. The AD2425W is an enhanced A2B transceiver offering an expanded feature set while retaining complete compatibility with existing AD241x devices. The AD2425W is fully configurable supporting both master and slave functionality.The AD2425W is targeted for use in wiring intensive applications where reducing the weight or complexity of existing cable harnesses is a primary system design objective. These applications include Premium Audio Systems, Active Noise Cancellation, and In-Car Communications.Applications Automotive audio communication link Active noise cancellation Microphone arrays for hands free and in car communication

The LTC1286/LTC1298 are micropower, 12-bit, successive approximation sampling A/D converters. They typically draw only 250?A of supply current when converting and automatically power down to a typical supply current of 1nA whenever they are not performing conversions. They are packaged in 8-pin SO packages and operate on 5V to 9V supplies. These 12-bit, switched-capacitor, successive approximation ADCs include sample-and-holds. The LTC1286 has a single differential analog input. The LTC1298 offers a software selectable 2-channel MUX.On-chip serial ports allow efficient data transfer to a wide range of microprocessors and microcontrollers over three wires. This, coupled with micropower consumption, makes remote location possible and facilitates transmitting data through isolation barriers.These circuits can be used in ratiometric applications or with an external reference. The high impedance analog inputs and the ability to operate with reduced spans (to 1.5V full scale) allow direct connection to sensors and transducers in many applications, eliminating the need for gain stages.Applications Battery-Operated Systems Remote Data Acquisition Battery Monitoring Handheld Terminal Interface Temperature Measurement Isolated Data Acquisition