Description

The AD9575 provides a highly integrated, dual output clockgenerator function including an on-chip PLL core that isoptimized for network clocking. The integer-N PLL design isbased on the Analog Devices, Inc., proven portfolio of high performance, low jitter frequency synthesizers to maximize linecard performance. Other applications with demanding phasenoise and jitter requirements also benefit from this part.The PLL section consists of a low noise phase frequency detector (PFD), a precision charge pump, a low phase noise voltagecontrolled oscillator (VCO), and pin selectable feedback and output dividers.By connecting an external crystal, popular network output frequencies can be locked to the input reference. The output divider and feedback divider ratios are pin programmable for therequired output rates. No external loop filter components are required, thus conserving valuable design time and board space.The AD9575 is available in a 16-lead, 4.4 mm ? 5.0 mm TSSOP and can be operated from a single 3.3 V supply. The temperature range is ?40?C to +85?C. APPLICATIONS GbE/FC/SONET line cards, switches, and routers CPU/PCI-E applications Low jitter, low phase noise clock generation

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Part number: AD9575-EVALZ-LVD

More details from Analog Devices Inc.