AD9683-250EBZ

Analog Devices Inc.

Description

The AD9683 is a 14-bit ADC with sampling speeds of up to250 MSPS. The AD9683 supports communications applicationswhere low cost, small size, wide bandwidth, and versatility aredesired.The ADC core features a multistage, differential pipelinedarchitecture with integrated output error correction logic. TheADC core features wide bandwidth inputs supporting a varietyof user-selectable input ranges. An integrated voltage referenceeases design considerations. A duty cycle stabilizer (DCS) isprovided to compensate for variations in the ADC clock duty cycle,allowing the converter to maintain excellent performance. TheJESD204B high speed serial interface reduces board routingrequirements and lowers pin count requirements for thereceiving device.The ADC output data is routed directly to the JESD204B serialoutput lane. These outputs are at CML voltage levels. Data can besent through the lane at the maximum sampling rate of 250 MSPS,which results in a lane rate of 5 Gbps. Synchronization inputs(SYNCINB? and SYSREF?) are provided.Flexible power-down options allow significant power savings,when desired. Programmable overrange level detection issupported via the dedicated fast detect pins.Programming for setup and control is accomplished using a3-wire SPI-compatible serial interface.The AD9683 is available in a 32-lead LFCSP and is specifiedover the industrial temperature range of ?40?C to +85?C.Product Highlights Integrated 14-bit, 170 MSPS/250 MSPS ADC. The configurable JESD204B output block supports lane rates up to 5 Gbps. An on-chip, phase-locked loop (PLL) allows users to provide a single ADC sampling clock; the PLL multiplies the ADC sampling clock to produce the corresponding JESD204B data rate clock. Support for an optional radio frequency (RF) clock input to ease system board design. Proprietary differential input maintains excellent SNR performance for input frequencies of up to 400 MHz. Operation from a single 1.8 V power supply. Standard serial port interface (SPI) that supports various product features and functions, such as controlling the clock DCS, power-down, test modes, voltage reference mode, overrange fast detection, and serial output configuration.Applications Communications Diversity radio systems Multimode digital receivers (3G) TD-SCDMA, WiMAX, W-CDMA, CDMA2000, GSM, EDGE, LTE DOCSIS 3.0 CMTS upstream receive paths HFC digital reverse path receivers Smart antenna systems Electronic test and measurement equipment Radar receivers COMSEC radio architectures IED detection/jamming systems General-purpose software radios Broadband data applications Ultrasound equipment


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Part number: AD9683-250EBZ

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