The ADG411, ADG412, and ADG413 are monolithic CMOS devices comprising four independently selectable switches. They are designed on an enhanced LC2MOS process which provides low power dissipation yet gives high switching speed and low on resistance.The on resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. Fast switching speed coupled with high signal bandwidth also make the parts suitable for video signal switching. CMOS construction ensures ultralow power dissipation, making the parts ideally suited for portable and battery-powered instruments.The ADG411, ADG412, and ADG413 contain four independent SPST switches. The ADG411 and ADG412 differ only in that the digital control logic is inverted. The ADG411 switches are turned on with a logic low on the appropriate control input, while a logic high is required for the ADG412. The ADG413 has two switches with digital control logic similar to that of the ADG411 while the logic is inverted on the other two switches.Each switch conducts equally well in both directions when on, and each has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. All switches exhibit break-before-make switching action for use in multiplexer applications. Inherent in the design is low charge injection for minimum transients when switching the digital inputs.PRODUCT HIGHLIGHTS Extended signal range The ADG411, ADG412, and ADG413 are fabricated on an enhanced LC2MOS, giving an increased signal range which extends fully to the supply rails. Ultralow power dissipation. Low RON Break-before-make switching This prevents channel shorting when the switches are configured as a multiplexer. Single-supply operation For applications where the analog signal is unipolar, the ADG411, ADG412, and ADG413 can be operated from a single-rail power supply. The parts are fully specified with a single 12 V power supply and remain functional with single supplies as low as 5 V.APPLICATIONS Audio and video switching Automatic test equipment Precision data acquisition Battery-powered systems Sample-and-hold systems Communication systems

The ADM2xxE is a family of robust RS-232 and V.28 interface devices which operates from a single +5 V power supply. These products are suitable for operation in harsh electrical environments and are compliant with the EU directive on EMC (89/336/ EEC). Both the level of emissions and immunity are in compliance. EM immunity includes ESD protection in excess of ±15 kV on all I-O lines (1000-4-2), Fast Transient Burst protection (1000-4-4) and Radiated Immunity (1000-4-3). EM emissions include radiated and conducted emissions as required by Information Technology Equipment EN55022, CISPR22.All devices fully conform to the EIA-232E and CCITT V.28 specifications and operate at data rates up to 230 kbps. Shutdown and Enable control pins are provided on some of the products. The shutdown function on the ADM211E disables the charge pump and all transmitters and receivers. On the ADM213E the charge pump, all transmitters, and three of the five receivers are disabled. The remaining two receivers remain active thereby allowing monitoring of peripheral devices. This feature allows the device to be shut down until a peripheral device begins communication. The active receivers can alert the processor which can then take the ADM213E out of the shutdown mode. Operating from a single +5 V supply, four external 0.1 µF capacitors are required. The ADM206E is available in a 24-pin SO package. The ADM207E and ADM208E are available in 24-pin DIP, SO, SSOP and TSSOP packages. The ADM211E and ADM213E are available in 28-pin SO, SSOP and TSSOP packages. All products are backward compatible with earlier ADM2xx products facilitating easy upgrading of older designs.

The ADM222, ADM232A, ADM242 are a family of high-speedRS-232 line drivers/receivers offering transmission rates up to200 kB/s. Operating from a single 5 V power supply, a highlyefficient on-chip charge pump using small (0.1 µF) externalcapacitors allows RS-232 bipolar levels to be developed. TwoRS-232 drivers and two RS-232 receivers are provided oneach device.The devices are fabricated on BiCMOS, an advanced mixedtechnology process that combines low power CMOS with highspeedbipolar circuitry. This allows for transmission rates up to200 kB/s, yet minimizes the quiescent power supply current tounder 5 mA.The ADM232A is a pin-compatible, high-speed upgrade for theAD232 and for the ADM232L. It is available in 16-lead DIPand in both narrow and wide surface-mount (SOIC) packages.The ADM222 contains an additional shutdown (SHDN) functionthat may be used to disable the device, thereby reducing thesupply current to 0.1 µA. During shutdown, all transmit/receivefunctions are disabled. The ADM222 is available in 18-leadDIP and in a wide surface-mount (SOIC) package.The ADM242 combines both shutdown (SHDN) and enable(EN) functions. The shutdown function reduces the supplycurrent to 0.1 mA. During shutdown, the transmitters are disabledbut the receivers continue to operate normally. Theenable function allows the receiver outputs to be disabledthereby facilitating sharing a common bus. The ADM242 isavailable in 18-lead DIP and in a wide surface-mount (SOIC)package.Applications Computers Peripherals Modems Printers Instruments

The ADP3338 is a member of the ADP330x family ofprecision low dropout anyCAP® voltage regulators. The ADP3338 operates with an input voltage range of +2.7 V to +8 V and delivers a load current up to 1 A. The ADP3338 stands out from the conventional LDOs with a novel architecture and an enhanced process that enables it to offer performance advantages and higher output currentthan its competition. Its patented design requires only a 1.0 µF output capacitor for stability. This device is insensitive to output capacitor Equivalent Series Resistance (ESR), and is stable with any good quality capacitor, including ceramic (MLCC) types for space-restricted applications.The ADP3338 achieves exceptional accuracy of ±0.9% at room temperature and ±1.8% over temperature, line and load variations. The dropout voltage of the ADP3338 is only 200 mV (typical) at 1 A. This device also includes a safety current limit and thermal overload protection. The ADP3338 has ultralow quiescent current 130 µA (typ) in light load situations.APPLICATIONS  Notebook, palmtop computers SCSI terminators Battery-powered systems Bar code scanners Camcorders, cameras Home entertainment systems Networking systems DSP/ASIC supplies

The ADSP-21160N SHARC® DSP is the second iteration of the ADSP-21160. Built in a 0.18 micron CMOS process, it offers higher performance and lower power consumption than its predecessor, the ADSP-21160M. Easing portability, the ADSP-21160N is application source code compatible with first generation ADSP-2106x SHARC DSPs in SISD (Single Instruction, Single Data) mode. To take advantage of the processor’s SIMD (Single Instruction, Multiple Data) capability, some code changes are needed. Like other SHARCs, the ADSP-21160N is a 32-bit processor that is optimized for high performance DSP applications. The ADSP-21160N includes a 100 MHz core, a dual-ported on-chip SRAM, an integrated I/O processor with multiprocessing support, and multiple internal buses to eliminate I/O bottlenecks.The ADSP-21160N introduces Single-Instruction, Multiple-Data (SIMD) processing. Using two computational units (ADSP-2106x SHARC DSPs have one), the ADSP-21160N can double performance versus the ADSP-2106x on a range of DSP algorithms.The ADSP-21160N continues SHARC’s industry-leading standards of integration for DSPs, combining a high-performance 32-bit DSP core with integrated, on-chip system features. These features include a 4M-bit dual ported SRAM memory, host processor interface, I/O processor that supports 14 DMA channels, two serial ports, six link ports, external parallel bus, and glueless multiprocessing.

The ADSP-21161 SHARC® DSP is the newest member of the Super Harvard Architecture (SHARC) family of programmable DSPs. Capable of 600 million math operations per second (MFLOPs), the ADSP-21161 sets a new level of performance for low-cost SHARC DSPs - more than three times the performance for comparable models at about the same price. Its road map includes a cost-effective path to 1200 MFLOPS for $5 per unit and a performance-driven path to 10 GFLOPS and beyond.'This newest edition to the SHARC family will open more possibilities for designers to design-in high performance digital signal processing into client-side applications and should help others reconsider applications they couldn’t do before with a single chip,' said Will Strauss, president of Forward Concepts. 'Analog Devices will certainly maintain customer loyalty with this road map.' The ADSP-21161 DSP is the second member of the SHARC DSP family of 32-bit floating-point programmable DSPs to be based on a SIMD core architecture that is optimized for digital signal processing performance. Like all SHARCs, the ADSP-21161 is code-compatible with all other members of the family and supports both fixed- and floating-point data types. The ADSP-21161 lowers the price for SIMD SHARC DSP performance and is an outstanding DSP solution for many price-sensitive applications.State-of-the-Art Development Tools The ADSP-21161, like all SHARC processors, is supported by a complete set of software and hardware development tools. The VisualDSP++® tool set offered by Analog Devices includes an optimizing C/C++ compiler, integrated development environment (IDE), assembler, linker, splitter and cycle accurate simulator that support both C and assembly debugging. Emulation support is JTAG-based and ADI offers USB, PCI, and Ethernet based emulators. SHARC DSP Roadmap There are two code-compatible paths that the SHARC DSP roadmap will follow. One optimized for high-performance multiprocessing systems and the other for price/performance. Performance is the key for multiprocessing applications and this is the reason that ADI will offer 10 GFLOP SHARC DSPs in the future. On-chip memory sizes will be balanced to match this performance with memories increasing to unprecedented levels (64 Mbit) using newly developed technologies.Industry leading price/performance will be the driver on the other path of the roadmap. In the future, these SHARC DSPs will offer an increase in performance to 1200 MFLOPs while decreasing price to as low as $5.00. This is required to support new technologies that demand substantial signal processing performance at consumer price points. 

The ADuC834 is a complete smart transducer front end,integrating two high resolution - ADCs, an 8-bit MCU, andprogram/data Flash/EE memory on a single chip.The two independent ADCs (primary and auxiliary) include atemperature sensor and a PGA (allowing direct measurement oflow level signals). The ADCs with on-chip digital filtering andprogrammable output data rates are intended for the measurementof wide dynamic range, low frequency signals, such as those inweigh scale, strain-gage, pressure transducer, or temperaturemeasurement applications.The device operates from a 32 kHz crystal with an on-chip PLLgenerating a high frequency clock of 12.58 MHz. This clock isrouted through a programmable clock divider from which the MCUcore clock operating frequency is generated. The microcontrollercore is an 8052 and therefore 8051 instruction set compatiblewith 12 core clock periods per machine cycle.62 Kbytes of nonvolatile Flash/EE program memory, 4 Kbytes ofnonvolatile Flash/EE data memory, and 2304 bytes of data RAMare provided on-chip. The program memory can be configuredas data memory to give up to 60 Kbytes of NV data memory indata logging applications.On-chip factory firmware supports in-circuit serial download anddebug modes (via UART), as well as single-pin emulation modevia the EA pin. The ADuC834 is supported by a QuickStart™development system featuring low cost software and hardwaredevelopment tools.Applications Intelligent sensors Weigh scales Portable instrumentation, battery-powered systems 4–20 mA transmitters Data logging Precision system monitoring

Modulator/Demodulator SiGe Direct Modulator 100 - 4000 MHz

Data Conversion IC Development Tools LTC2328-16 Demo Board -16-Bit, 1Msps, Si

The LTC4310 provides bidirectional I2C communications between two I2C buses whose grounds are isolated from one another. Each LTC4310 encodes I2C bus logic states into signals that are transmitted across an isolation barrier to another LTC4310. The receiving LTC4310 decodes the transmission and drives its l2C bus to the appropriate logic state. The isolation barrier can be bridged by an inexpensive Ethernet, or other transformer, to achieve communications across voltage differences reaching thousands of volts, or it can be bridged by capacitors for lower voltage isolation. The LTC4310-1 is intended for use in 100kHz I2C systems. The LTC4310-2 is intended for 400kHz I2C systems.Rise time accelerators provide strong pull-up currents on SCL and SDA rising edges to meet rise time specifications for heavily loaded systems. Data and clock Hot Swap™ circuitry prevent data corruption when a card is inserted into or removed from a live bus. When a bus is stuck low for 37ms, the LTC4310 turns off its pull-down devices and generates up to sixteen clocks and a STOP bit in an attempt to free the bus. Driving EN low sets the LTC4310 in a very low current shutdown mode to conserve power.Applications Isolated I2C, SMBus and PMBus Interfaces Isolated Power Supplies Positive-to-Negative Rail Communications Power-over-Ethernet

The LTC2262-12 is a sampling 12-bit A/D converter designed for digitizing high frequency, wide dynamic range signals. The LTC2262-12 is perfect for demanding communications applications with AC performance that includes 70.5dB SNR and 88dB spurious free dynamic range (SFDR). Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±0.3LSB INL (typical), ±0.1LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS.The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2262-12 12 LTC2262-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition Nondestructive Testing

The LTC2262-14 is a sampling 14-bit A/D converter designed for digitizing high frequency, wide dynamic range signals. The LTC2262-14 is perfect for demanding communications applications with AC performance that includes 72.8dB SNR and 88dB spurious free dynamic range (SFDR). Ultralow jitter of 0.17psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±1LSB INL (typical), ±0.3LSB DNL (typical) and no missing codes over temperature. The transition noise is a low 1.2LSBRMS.The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V.The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2262-12 12 LTC2262-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition Nondestructive Testing

The LTC2634 is a family of quad 12-, 10- and 8-bit voltage output DACs with an integrated, high accuracy, low drift 10ppm/°C reference in 16-lead QFN and 10-lead MSOP packages. It has rail-to-rail output buffers and is guaranteed monotonic. The LTC2634-L has a full-scale output of 2.5V, and operates from a single 2.7V to 5.5V supply. The LTC2634-H has a full-scale output of 4.096V, and operates from a 4.5V to 5.5V supply. Each DAC can also operate with an external reference, which sets the full-scale output to the external reference voltage.These DACs communicate via an SPI/MICROWIRE compatible 3-wire serial interface which operates at clock rates up to 50MHz. Serial data output (SDO), a hardware clear (CLR), and an asynchronous DAC update (LDAC) capability are available in the QFN package. The LTC2634 incorporates a power-on reset circuit. Options are available for reset to zero-scale or reset to mid-scale in internal reference mode, or reset to mid-scale in external reference mode after power-up.Applications Mobile Communications Process Control and Industrial Automation Automatic Test Equipment Portable Equipment Automotive

The LTC2265-12/LTC2264-12/LTC2263-12 are 2-channel, simultaneous sampling 12-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 71dB SNR and 90dB spurious free dynamic range (SFDR). Ultralow jitter of 0.15psRMS allows undersampling of IF frequencies with excellent noise performance.DC specs include ±0.3LSB INL (typ), ±0.1LSB DNL (typ) and no missing codes over temperature. The transition noise is a low 0.3LSBRMS.The digital outputs are serial LVDS to minimize the number of data lines. Each channel outputs two bits at a time (2-lane mode) or one bit at a time (1-lane mode). The LVDS drivers have optional internal termination and adjustable output levels to ensure clean signal integrity.The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles. Bits LTC2265-12 12 LTC2265-14 14 Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multichannel Data Acquisition Nondestructive Testing

The LTC2182/LTC2181/LTC2180 are two-channel simultaneous sampling 16-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 77dB SNR and 90dB spurious free dynamic range (SFDR). Ultralow jitter of 0.07psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ) and no missing codes over temperature. The transition noise is 3.3LSBRMS. The digital outputs can be either full rate CMOS, Double Data Rate CMOS, or Double Data Rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition Nondestructive Testing

The LTC2162/LTC2161/LTC2160 are sampling 16-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 77dB SNR and 90dB spurious free dynamic range (SFDR). Ultralow jitter of 0.07psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ) and no missing codes over temperature. The transition noise is 3.3LSBRMS. The digital outputs can be either full rate CMOS, double data rate CMOS, or double data rate LVDS. A separate output power supply allows the CMOS output swing to range from 1.2V to 1.8V. The ENC+ and ENC– inputs may be driven differentially or single-ended with a sine wave, PECL, LVDS, TTL, or CMOS inputs. An optional clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.Applications Communications Cellular Base Stations Software Defined Radios Portable Medical Imaging Multichannel Data Acquisition Nondestructive Testing

The LTC2192/LTC2191/LTC2190 are 2-channel, simultaneous sampling 16-bit A/D converters designed for digitizing high frequency, wide dynamic range signals. They are perfect for demanding communications applications with AC performance that includes 77dB SNR and 90dB spurious free dynamic range (SFDR). Ultralow jitter of 0.07psRMS allows undersampling of IF frequencies with excellent noise performance. DC specs include ±2LSB INL (typ), ±0.5LSB DNL (typ) and no missing codes over temperature. The transition noise is 3.3LSBRMS. To minimize the number of data lines the digital outputs are serial LVDS. Each channel outputs one bit, two bits or four bits at a time. The LVDS drivers have optional internal termination and adjustable output levels to ensure clean signal integrity. The ENC+ and ENC– inputs may be driven differentially or single ended with a sine wave, PECL, LVDS, TTL or CMOS inputs. An internal clock duty cycle stabilizer allows high performance at full speed for a wide range of clock duty cycles.Applications Communications Cellular Base Stations Software-Defined Radios Portable Medical Imaging Multi-Channel Data Acquisition Nondestructive Testing

The LT3748 is a switching regulator controller specifically designed for the isolated flyback topology and capable of high power. It drives a low side external N-channel power MOSFET from an internally regulated 7V supply. No third winding or opto-isolator is required for regulation as the part senses the isolated output voltage directly from the primary-side flyback waveform.The LT3748 utilizes boundary mode to provide a small magnetic solution without compromising load regulation. Operating frequency is set by load current and transformer magnetizing inductance. The gate drive of the LT3748 combined with a suitable external MOSFET allow it to deliver load power up to several tens of watts from input voltages as high as 100V.The LT3748 is available in a high voltage 16-lead MSOP package with four leads removed.APPLICATIONS Isolated Telecom Converters High Power Automotive Supplies Isolated Industrial Power Supplies Military and High Temperature Applications

The ADuCRF101 is a fully integrated, data acquisition solution that is designed for low power, wireless applications. It features a 12-bit analog-to-digital converter (ADC), a low power ARM Cortex™-M3 processor, a 862 MHz to 928 MHz and 431 MHz to 464 MHz RF transceiver, and Flash®/EE memory. The ADuCRF101 is packaged in a 9 mm × 9 mm LFCSP.The data acquisition section consists of a 12-bit SAR ADC. The six inputs can be configured in single-ended or differential mode. When configured in single-ended mode, they can be used for ratiometric measurements on sensors that are powered, when required, from the internal low dropout regulator (LDO). An internal battery monitor channel and an on-chip temperature sensor are also available.This wireless data acquisition system is designed to operate in battery-powered applications where low power is critical. The device can be configured in normal operating mode or different low power modes under direct program control. In flexi mode, any peripheral can wake up the device and operate it. In hibernate mode, the internal wake-up timer remains active. In shutdown mode, only an external interrupt can wake up the device.The ADuCRF101 integrates a low power ARM Cortex-M3 processor. It is a 32-bit RISC machine, offering up to 1.25 DMIPS peak performance. The ARM Cortex-M3 processor also has a flexible 14-channel direct memory access (DMA) controller that supports communication peripherals, serial peripheral interface (SPI), UART, and I2C. Also provided on chip are 128 kB of nonvolatile Flash/EE memory and 16 kB of SRAM.A 16 MHz on-chip oscillator generates the system clock. This clock can be internally divided for the processor to operate at a lower frequency, thus saving power. A low power, internal 32 kHz oscillator is available and can be used to clock the four timers, as follows: two general-purpose timers, a wake-up timer, and a system watchdog timer.A range of communication peripherals can be configured, as required, in a specific application. These peripherals include UART, I2C, SPI, GPIO ports, PWM, and RF transceivers.The RF transceiver communicates in the 862 MHz to 928 MHz and 431 MHz to 464 MHz frequency bands using multiple configurations.On-chip factory firmware supports in-circuit serial download via the UART, and nonintrusive emulation and program download are also supported via the serial wire interface. These features are incorporated into a low cost development system supporting this precision analog microcontroller family.The ADuCRF101 operates from 2.2 V to 3.6 V and is specified over an industrial temperature range of −40°C to +85°C. It is available in a 64-lead LFCSP packageApplications Battery powered wireless sensor Medical telemetry systems Industrial and home automation Asset tracking Security systems (access systems) Health and fitness applications  

The AD5390 / AD5391 are complete single-supply, 16-channel, 14-bit and 12-bit DACs, respectively. The AD5392 is a complete single-supply, 8-channel, 14-bit DAC. The devices are available in either a 64-lead LFCSP or a 52-lead LQFP. All channels have an on-chip output amplifier with rail-to-rail operation. All devices include an internal 1.25/2.5 V, 10 ppm/°C reference, an on-chip channel monitor function that multiplexes the analog outputs to a common MON_OUT pin for external monitoring, and an output amplifier boost mode that optimizes the output amplifier slew rate.The AD5390 / AD5391 / AD5392 contain a 3-wire serial interface with interface speeds in excess of 30 MHz that are compatible with SPI®, QSPI™, MICROWIRE™, and DSP interface standards and an I2C-compatible interface supporting a 400 kHz data transfer rate.An input register followed by a DAC register provides double-buffering, allowing DAC outputs to be updated independently or simultaneously using the LDAC input. Each channel has a programmable gain and offset adjust register, letting the user fully calibrate any DAC channel.Power consumption is typically 0.25 mA per channel.APPLICATIONS Instrumentation and industrial control Power amplifier control Level setting (ATE) Control systems Microelectromechanical systems (MEMS) Variable optical attenuators (VOAs) Optical transceivers (MSA 300, XFP)