This application report describes the configuration changes in the data flash constants in the Texas Instruments bq20z80 Gas Gauge Evaluation Software for a variety of battery-pack configurations.
This document describes the linear feedback shift register (LFSR), fault grading, pseudorandom pattern generation (PRPG), and a parallel signature analyser (PSA). An LFSR and PSA are used to test a T
Users of the bq27000 and bq27200 ICs can program ten EEPROM locations to optimize setups for particular battery and host requirements. This application report describes how to configure these ICs for those requirements.
This document shows a solution to enhance the start-up performance of the TPS603x charge pumps. With the circuitry shown, the device can drive at start-up into full load (40 mA).
Designers need a wide range of fine-pitch surface mount packages to meet today?s systems constraints in broad area and total volume. The SSOP and SQFP packages allow bus-interface logic devices to meet the wider data bus trends and provide superior electrical performance while minimizing space requirements. This document discusses the evolution of bus-interface packages their impedance the 3.3-
This report presents algorithm and code implementing floating-point addition subtraction multiplication and division with the TMS320. The support of floating-point operations by the TI processors has made possible some applications such as implementation of the CCITT Adaptive Differential Pulse Code Modulation (ADPCM) algorithm and image/graphics operations.
Ground loops can be introduced when different components in audio systems are connected with standardaudio cables and these loops can cause annoying interference. In many cases the interference can bereduced significantly with a ground loop break (GLB) circuit including a low-value resistor and differentialamplifiers. This paper explains this approach and how to design a GLB circuit.
This report describes the coding requirements techniques and decisions whichmust be made to utilize the TMS320C80 DSP as an integrated services digitalnetwork (ISDN) video-system manager and provides an overview on how theprocessor handles video signal in the ISDN narrow-band format in conformancewith the International Telecommunications Union (ITU)?T H.261 Recommendation.
Increasing performance requirements of personal computers that necessitate a larger number of SDRAMs and DIMMs can be met by an FET-switch muliplexer. Four devices for memory interleaving for the 440BX and other core-logic chipsetsincorporate internal pulldown resistors damping resistors and make-before-break features that increase speed while maintaining minimal simultaneous-switching noise.
Today?s communications equipment requires DSPs to perform complicated algorithms in a limited amount of time. One such algorithm is the equalizer in a digital receiver. The equalizer removes distortions caused by the communications link between the transmit and receive antennae. This document discusses implementing an equalizer for the IS-54 standard on the fixed point TMS320C5x DSP. Background fo
Decompensated operational amplifiers have improved noise slew rate harmonic distortion etc. but required external compensation for stable operation. This report shows how to compensate such an amplifier and achieve the performance enchancement it provides in a unity-gain configuration.The THS4011 and THS4021 operational amplifiers are used to illustrate the superior performance mentioned a
Advances in digital signal processors (DSPs) are driving both high-computational performance and power efficiency into ever increasing application areas. The medical diagnostic ultrasound industry can