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Application Notes from Texas Instruments

Simplified Programming of Altera FPGAs Using CSANSTA111/112 JTAG Scan Chain Mux (Rev. D)

Texas Instruments
This Application Note describes the operating modes of SCANSTA111/112 and their uses in partitioningcomplex scan chains. Several examples are illustrated in simplied programming with Altera FPGA orCPLD with SCANSTA111/112.

Client Side Telephony (CST) Chip Flex Mode Flex Examples Description

Texas Instruments
Client Side Telephony (CST) Chip Flex Mode Flex Examples Description Application Report

Interface Circuits for TIA/EIA-232-F (Rev. A)

Texas Instruments
This design note provides information concerning the designing of TIA/EIA-232-F interface circuits. The TIA/EIA-232-F standard is covered including the electrical specification maximum cable lengths and the DB9S connector. The section entitled Optimizing PC Interface Devices discusses the following topics: SN75C185 power considerations interface power-consumption calculations the SN75LP185A an

MSP430F4270 Altimeter Demo

Texas Instruments
This application report describes the implementation of an altimeter using a fullyintegrated MCU solution with the MSP430F42x0 family of microcontrollers. An air pressure sensor is directly interfaced

CDAC Architecture Gives ADC574 Pinout /Sampling, Low Power, New Input Ranges

Texas Instruments
This application note compares basic current-mode successive approximation A/Ds with CDAC-based architectures, and shows how adding a resistor divider network to the CDAC input permits the Burr-Brown

Heat Sinking- TO-3 Thermal Model

Texas Instruments
A critical issue with all semiconductor devices is junction temperature (TJ). TJ must be kept below its maximum rated value typically 150°C. The lower the junction temperature the better. The thermal circuit shown allows temperature to be estimated with simple calculations. The temperature rise across each interface is equal to the total power dissipated in the device ti

Implementing an Ultra-Low-Power, Single-Chip Thermocouple Circuit

Texas Instruments
Implementing an Ultra-Low-Power, Single-Chip Thermocouple Circuit With the MSP430F423

Interfacing the DAC8564 to the MSP430F449

Texas Instruments
This application report describes how to interface the DAC8564 digital-to-analog converter (DAC) to the MSP430F449 mixed-signal microcontroller. This document discusses how the internal reference is d

Hot Plug-In In-Rush Current Limiting Circuits for PT3100/4100/3320 DC-DC Convert (Rev. A)

Texas Instruments

In-rush current is the initial current that flows to the converter’s input de-coupling capacitor(s) when the host board assembly is connected to an active input power source. The magnitude of the in-rush current is high and can induce arcing, transients, and erosion of the connector. Limiting the in-rush current allows the host board assembly to be safely plugged into a live system backplane connector, such as those powered from a -48V central office power supply.

OA-29 Low-Sensitivity, Highpass Filter Design with Parasitic Compensation (Rev. B)

Texas Instruments
This application report covers the design of a Sallen-Key highpass biquad. This design gives low component and op amp sensitivities. It also shows how to compensate for the op amp?s bandwidth (predis

Going to Production With the bq2754x (Rev. A)

Texas Instruments
This application report presents a strategy for high speed economical calibration and production programming of the bq2754x single-cell gas gauge. Flowchart examples are provided along with step-by-step instructions for preparing a calibration data set that is required when creating the golden data flash image (DFI) that is programmed into all bq2754x at the pack maker production line.

25-W, High-Power PoE Using the TPS2376-H

Texas Instruments
This document describes the characteristics, operation, and use of reference design PR567A demonstrating high-power Power-over-Ethernet (PoE). Typical PoE applications consist of two parts: 1) power s

TMS320C621x/TMS320C671x EDMA Architecture

Texas Instruments
The enhanced DMA (EDMA) controller of the TMS320C621x™/TMS320C671x™ device is a highly efficient data transfer engine. To maximize bandwidth minimize transfer interference and fully utilize the resources of the EDMA it is crucial to understand the architecture of the engine. Transfer requests (TRs) originate from many requestors including sixteen programmable EDMA channels the lev

Parallel Digital Signal Processing: An Emerging Market

Texas Instruments
Three key factors in parallel processing are interprocessor communication, parallel debugging, and parallel programming. This document provides an overview of digital signal processing markets, on-chi

Passing CISPR25 Radiated Emissions Using the TPS54160-Q1

Texas Instruments
This application report provides a summary of CISPR25-Radiated Emissions test results using the TPS54160-Q1 high-frequency buck converter. Similar results can be achieved using other devices in this f

CAN Design White Paper

Texas Instruments
CAN Design White Paper

bq20z90-V110 to bq20z90-V150 Change List

Texas Instruments
bq20z90-V150 Design Considerations

Understanding EEPROM Programming for High Speed Repeaters and Mux Buffers

Texas Instruments
System designers often use EEPROM (Electrically Erasable Programmable Read-Only Memory) to program a set of customized high speed repeater and mux buffer start-up settings that are different from the default. Using the information here will make repeater EEPROM configuration and programming easy to implement and understand. This application note addresses SMBus-to-EEPROM mapping for 2-channel repe

3.6V - 6.0V Input, High-Efficiency DCDC Converter Reference Design for Stellaris®

Texas Instruments

This design was created to help those desiring to design-in a Stellaris® ARM® Cortex™-M3 MCU into a system using an input voltage in the range of 3.6V to 6.0V and is interested in using a high-efficiency DCDC Converter with integrated FETs for a small, simple design.

Interleaving Analog-to-Digital Converters

Texas Instruments
It is tempting when pushing the limits of analog-to-digital conversion to consider interleaving two or more converters to increase the sample rate. However, such designs must take into consideration s

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