This application report describes the motivation for behavior of and reliability of overtemperature protection in RS-485 line circuits for TIA/EIA-485 physical layer line circuits. The behavior of the bus I/Os during an overtemperature event in the SN65LBC176A RS-485 line circuit is described.
This application report describes single-supply op amp applications their portability and their design techniques. The single-supply op amp design is more complicated than a split- or dual-supply op amp but single-supply op amps are more popular because of their portability. New op amps such as the TLC247x TLC07x and TLC08x have excellent single-supply parameters. When used in the correct app
TI’s FPD-Link II family of embedded clock LVDS SerDes provide enhanced features and improved signal quality over prior generations of FPD-Link SerDes devices for Display applications. FPD-Link Chipsets serialized the wide parallel RGB buses down to 4 or 5 pairs of LVDS signaling depending upon the chipset. 18-bit RGB was serialized to three LVDS data lines and a LVDS clock while 24-bit RGB was s
This getting started guide (GSG) walks through setting up the AM17x EVM and installing the software. By the end of this GSG, you will have the EVM booting to Linux and the Linux host development envir
The TMS320C5515 and the TMS320C5505 will henceforth in this document be referred to as C5515/05. The TMS320C5517 will henceforth in this document be referred to as C5517.This document provides the minimum changes required to migrate from the C5515/05 to the C5517. Enhancements or new features of the C5517 that do not affect migrating from the C5515/05 to the C5517 are also briefly mentioned in
This application report presents a method for interfacing the modular MSOP8EVM, an evaluation module (EVM) for single-channel, low-power, 8- to 16-bit serial analog-to-digital converters to the TMS470
Artificial Neural Networks (ANN) is succesfully used in many areas such as fault detection control and signal processing in our daily technology. Artificial Neural Networks have nonlineer structure and this is an effective feature that it approaches to the results of learning phase. Then it gives results in test phase in short time (the degree about 10 to the -3 second). It is a very preferable
This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, or OMAP-L132/L138 processor. Using sequenced power supplies, this reference design describes a sys
This application report contains information and examples on how to disable the internal clock oscillator on the TMS320VC5503 TMS320VC5506 TMS320VC5507 TMS320VC5509 and TMS320VC5509A DSPs to minimize power consumption. The document contains an overview of how the internal clock oscillator operates and how to disable it as part of the IDLE power-down feature. It also discusses how to wake up t