TI's touch screen and audio codec/DAC devices such as the TSC2100 TSC2101 TSC2102 TLV320AIC26 TLV320AIC28 and the TLC320DAC26 have one or more audio-band programmable gain amplifiers (PGA) in their input circuitry. This application report describes how to implement this PGA function using the TLV320DAC26 as an example.
The TMS320C62x™ digital signal processing library (DSPLIB) provides a set of C-callable assembly-optimized functions commonly used in signal processing applications e.g. filtering and transform. The DSPLIB includes several functions for each processing category based on the input parameter conditions to provide parameter-specific optimal performance. Therefore it is important to unders
The CDC857 and the CDCV850 devices are PLL-based differential clock drivers with a maximum operational frequency of 167 MHz. These devices have been designed to support a double-data-rate (DDR) specification and therefore they have higher immunity against incoupling common mode noise. However they require a differential clock input signal.This report shows (a) how to convert a single ended cl
Selecting the right operational amplifier for a specific application requires you to have your design goals clearly in mind along with a firm understanding of what the published specifications mean.
A controller area network (CAN) is ideally suited to the many high-level industrial protocols embracing CAN and ISO-11898:1993 as their physical layer. Its cost, performance, and upgradeability provid
The IEEE standard boundary scan framework and four-wire serial testablity are having a positive impact on testing all levels of electronic assembly. The two form a basis from which other techniques are developed to facilitate testing of chips and systems. This document shows how existing architectures can be modified to conform to IEEE 1149.1 architecture. A boundary BIST approach is described and
Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control (
This application report summarizes the key differences between the enhanced direct memory access (EDMA3) used on C64x+™ DSP devices and the EDMA2 used on TMS320C64x™ DSP devices, and provi
The purpose of this application report is to present the flow the environment settings and TI requirements used to perform the analysis of critical power nets of a platform using an application processor. The Power Delivery Network (PDN) performance is measured by extracting and analyzing three printed circuit board (PCB) parameters: DC resistivity capacitor loop inductance and broadband target
Today, the brains of telecom and datacom systems - i.e., microprocessors, DSPs, ASICs, and programmable logic - are evolving to ever-lower operating voltages. Typical ICs run at supply levels of 3.3 V