AC LED Lighting & Communications Hardware Developer?s Kit TMDSIACLEDCOMKIT_SPRABS2_ZHCA514

Prolonged exposure to excessive levels of acoustic noise can cause permanent hearing loss safety problems and lower work productivity. An adaptive controller that optimally cancels unwanted acoustic noise while allowing the desired sounds such as speech and warning signals would be particularly useful for people using heavy machinery or working near engines. This document describes the design

In electronic systems design there is a need to provide an interface between different voltage levels. Texas Instruments offers four split-rail bus transceivers with dual voltage-supply inputs. These transceivers allow translation between 3.3-V LVTTL/LVCMOS and 5-V CMOS 2.5-V CMOS and 5-V CMOS and 2.5-V CMOS and 3.3-V LVTTL/LVCMOS. These devices are the SN74LVCC3245A SN74LVC4245A SN74LVCC4245

Nonvolatile low-power ferroelectric RAM (FRAM) is capable of extremely high-speed write accesses. This application report discusses how to maximize FRAM write speeds specifically in the MSP430FRxx fam

The DS34RT5110 can be used as a TMDS equalizer capable to support 3 data and 1 clock lines up to 3.4 Gbps per data line (or up to 340 MHz pixel clock). It is capable to support common display resolutions at 1080P/8-bit color at 1.485 Gbps per data line or 1080P/12-bit at 2.25 Gbps or 4k/8-bit resolution at 2.97 Gbps. The DS34RT5110 has on-chip 50Ω input terminations to 3.3V

This application note presents a method for interfacing the TLC4541 16-bit SAR analog-to-digital converter to the TMS320C6711™ DSP McBSP1. The software developed reads 1024 samples continuously from the TLC4541. In an effort to reduce development time the source code is made available on TI's website.

A TI TMS320 DSP PCMCIA card is designed for use by a host CPU as a generic processor. This allows the card to be configured as a telephone answering machine a data/fax modem a speakerphone a note taker a character recognition system or a business audio card. This document describes the generic system architecture and operation of such a PCMCIA card.

FDC1004 Capacitive Sensing: Ins and Outs of Active Shielding

Driving a current doubler synchronous rectification output stage can be a very complex task especially for a phase shifted full bridge topology. However using the A and B outputs of the UCC3895 along with the UCC37324 dual 4-A MOSFET driver direct PWM control of a synchronous rectifier current doubler output stage achieves. This technique provides the proper gating and timing signals necessary

This document holds articles for specific application examples and technologies. It also includes a selection guide for <b>antennas</b> in low-power RF applications.

This application report offers a tutorial discussion on jitter in switching DC-DC converters. Not all power supply designs are equally susceptible to jitter nor are they equally affected by jitter. Modes of switching jitter are defined and explained for several popular control architectures which are then analyzed for sources of jitter. An example contrasting the amount of jitter and effect on o

This application report discusses how a super matched bipolar transistor pair sets new standards for driftand noise.

UCD90120, UCD90124 Monitoring Voltage, Current and Temperature Using the UCD9012x PMP/Linear_Power/Supervisors_Sequencers/2-App_Reports

IMPLICATIONS OF SLOW OR FLOATING CMOS INPUTS

This application report explains the concept and the operation of the Energy Detect mode of the DP83848.

This application note provides an easy to use process to help users design a 1.5 Amp buck regular usingthe LM5575 and LM25575 switching regulators.

Flyback Converters AC Modeling of Power Stage in Flyback Converter

This application report discusses how CSL's INTC module could be used to share the task of dispatching interrupts with the OS in scenarios where the OS's interrupt dispatcher does not comprehend cascaded interrupts.

The solution involves having the CSL dispatch the cascaded interrupts alone while completely leaving the job of dispatching primary CPU interrupts to the OS.

We also discuss an

BQ25504 BQ25504 Optimization of MPPT algorithm

Designing with TPS7H3301SP DDR Termination