This application report discusses how combining an “inferior” 20 year old A/D conversion technique with amicroprocessor a developmental A/D converter achieves 1 part-per-million (20-bit) linearity.

DN010 -- Close-in Reception with CC1101

This application report provides basic circuits of the Texas Instruments op amp collection.

High-performance signal processing devices such as FPGAs and DSPs require multiple power supply voltages for operation. The order and timing in which these supply outputs power up and down is usually specified. A design example using the TPS54380 is shown for the case where the power supply to be tracked is also the input voltage to the TPS54380. Information is provided for adjusting the start-u

This application note addresses a method to OR the high side of the power source as well as the low side using N-channel MOSFETs, thus replacing diodes D1 and D2 with more efficient MOSFETs in the hig

Application Note 294 Special Sample and Hold Techniques

CC1190 CC1120, CC1200 AN110 ? Using CC1190 Front End with CC112x/CC120x under FCC 15.247

This application note provides Pin Open and Short Test Results for the device pins of the TPS54xx0-Q1and TPS57xx0-Q1 family of step-down SWIFT™ DC-DC converters. The TPS54xx0-Q1 and TPS57xx0-Q1 family of power devices consists of high-input-voltage step-down regulators that provide a variety ofcurrent options.

Resistive elements configured as Wheatstone bridge circuits are used to construct force and pressure sensors. The resistive elements used to make the bridge change resistance in response to mechanical strain.This report discusses the basic concepts of resistive bridge sensors and three circuits commonly used for signal conditioning their output.

The RapidIO® Message Queue Transport (MQT) allows applications to communicate to other TI DSP processors via serial RapidIO. The RapidIO MQT plugs into the MSGQ module of DSP/BIOS. The RapidIO MQT module uses the messaging logical layer of RapidIO to send MSGQ messages between processors. The MSGQ module manages the communication with the MQTs off-loading that burden from the application. The

The G.726 is a voice-compression algorithm standard defined by the International Telecommunication Union (ITU). It can be used in many applications such as digital cordless telephones radio/wireless local loop and pair-gain. The software package described in this application report is plug and play compliant with the multichannel framework using the TMS320C54x DSP.

Note: To license the code

The TI D-CAP™ Mode controller is widely used in computing power management. D-CAP™ Mode requires an appropriate amount of equivalent series resistance (ESR) on output capacitors to ensure the loop stability. However many customers prefer to use a low-ESR capacitor such as a ceramic output capacitor. Sufficient output ripple however may not be available in this case to ensure the system stabili

Configuring the bq20z90 Data Flash

The Burr-Brown REF102 is a buried-zener-based precision 10.0V reference. It has better stability and about five times lower output noise than band-gap-based voltage references such as the PMI REF-10. Still its output noise is about 600uVp-p at a noise bandwidth of 1MHz (the output noise of the PMI REF-10 is about 3000uVp-p at 1MHz).

This book describes the architecture of the TMS320C30 APPB (applications board), part of the TSM320C30 XDS1000 Development System. The APPB was designed to provide a basic platform for software development and a variety of interfaces to the TMS320C30. The four key interfaces used on the APPB are:

• SRAM
• EPROM
• Dual-port SRAM
• DRAM

The book provides basic functional details of the TMS320C30 APPB. Since the SRAM and EPROM interfaces on the APPB are simple, the book's discussion centers on the dual-port SRAM and RAM interfaces and includes the following topics:

• Discussion of the APPB features
• Host/TMS320C30 Interface
• Expansion interface

Supporting figures include:

• Host interface block diagram TMS320C30 bank addressing
• Timing diagrams
• TMS320C30 applications
• TMS320C30 Applications board

Tables included cover:

• Host I/O Memory locations for control registers
• APPB general-purpose control register bits and bit definitions

The book concludes with a series of appendices that contain source code for routines written in C. The contents of these appendices include:

• TMS320C30 applications board routines for both the PC side and the TMS320C30 side
• Memory map and description (TMS320C30 view)
• TMS320C30 software development board
• Various modules
• TMS320C30 software development schematics
• TMS320C30 SWDS DRAM module schematics

TPS80032 Schematic Checklist HVAL/MIS/AR

When a dc/dc converter providing a regulated output voltage between the minimum and maximum input voltage is required neither a single buck or a boost converter can provide the output voltage. However a boost converter integrated circuit (IC) can be configured to drive a single-ended primary-inductor converter (SEPIC) power stage and provide an output voltage that is between the input voltage e

The TMS320C6000? (C6000?) Multichannel Buffered Serial Port (McBSP) is designed to interface to a device that supports synchronous Serial Peripheral Interface (SPI). This document describes the hardware interface between the McBSP and a SPI ROM. The McBSP operates as the master in a user-specified clock stop (CLKSTP) mode in order to communicate with the SPI ROM. The McBSP initialization and contr

Hotswap circuits rely on the thermal capacitance of the series-limiting MOSFET to dissipate the large transient energy under current- or power-limit operation. The peakjunction temperature must be controlled in order to achieve a robust design. The constant-power MOSFET protection of the TPS2490 provides a simple method to useinformation provided by MOSFET manufacturers to determine peak junct