Load requirements often change during the project development phase affecting time to market schedules and budgets. Additionally higher efficiency may be needed to meet tight power budgets and higher output current devices typically have lower drain-to-source resistances. Fortunately many SWIFT(TM) DC/DC converters are pin compatible allowing the user to increase or decrease the output curr

This document describes how to configure the digital I/Os of the Texas Instruments (TI?) TMS320F240. The TMS320F240 DSP controller has 28 digital I/O pins. All 28 digital I/Os are multiplexed with oth

Application Note 967 LocalTalk Physical Layer Alternatives

It is well known to analog experts that you can use the positive and negative inputs of an operationalamplifier to make a high-impedance current source (current pump) using a conventional operationalamplifier (op amp). This basic circuit can put out both + and - output current (or zero current) into variousloads. The theory is simple. But the practical problems involved are not so simple or

This document describes how to configure Codec Engine-based audio/video applications on the DM6446 (DaVinci) for use in a system that has less than the 256 MB of DDR2 memory that the evaluation board provides. Specifically we present steps for shrinking memory requirements down to 64 MB but the principles apply to any amount of DDR2.

This voice-echo canceler implementation is based on a similar implementation using the TMS320C2x 16-bit fixed-point digital signal processor (DSP). This document shows the differences between the two applications and highlights specific TMS320C5x features that support a voice echo canceler. The appendix provides a schematic for a dual-telephone interface for the TMS320C51.

This application report discusses the power consumption of the Texas Instruments OMAP-L138.

This application note explains the basic operation of the two-switch Flyback-power stage, and clarifies benefits and design restrictions not present in traditional Flyback-topology. Power st

When using the I2C™ bus protocol the designer must ensure that the hardware complies with the I2C standard. This application report describes the I2C protocol and provides guidelines on debugging a missing acknowledgment selecting the pullup resistors or meeting the maximum capacitance load of an I2C bus. A conflict occurs if devices sharing the I2C bus have the same slave address. This

This report details the factors that influence achievable accuracy of the low frequency oscillator, specifically for real-time clock (RTC) applications. The intent of this application report is to pro

The MSP430 is typically used in applications such as metering, intelligent sensing, control systems and portable instrumentation. In some systems, the microcontroller may need to interface to an exter

Every real-time embedded system needs to be able to interact to events associated with the external world in a timely manner; for this typically every digital signal processor (DSP) device features one or more dedicated pins which are used for carrying these external signals called interrupts inside the device for further processing by the application. The TMS320C672x generation of processors

This document describes the Tconf language coding standards. This standard describes general lexical conventions. The benefits of these coding standards include preventing namespace collisions simplifying the use of modules and improving productivity. Third-party software vendors are encouraged to follow these coding standards. These coding standards are suggested but not mandatory for third p

Voltage Mode Boost Converter Small Signal Control Loop Analysis Using the TPS61030

The GC1115 crest factor reduction (CFR) processor reduces the peak-to-average ratio (PAR) of 3G wireless signals. This application report describes how GC1115 users canconfigure the device to achieve the desired peak reduction for 3G applications. In this application report the term 3G refers both to the UMTS (3GPP) standard and to thecdma2000 (3GPP2) standards. Examples are provided for both

This application report discusses how the performance of high-speed pipeline ADCs can be optimized by designing the right clock circuitry, a good analog input network, as well as how to get the data