This application report describes a method of synchronization that provides much more accuratesynchronization in systems with larger PDV. The method described attempts to detect minimum delays or'lucky packets'. The method also takes advantage of the DP83640 clock control mechanism to separatelycontrol clock rate and time corrections minimizing overshoot or wild swings in the accuracy of t
Part Number | Name | Companion Part | |
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DP83630SQE/NOPB | DP83630SQE/NOPB | Buy Datasheet | |
DP83630SQX/NOPB | DP83630SQX/NOPB | Buy Datasheet | |
DP83640TVV | DP83640TVV | Buy Datasheet | |
DP83640TVV/NOPB | DP83640TVV/NOPB | Buy Datasheet |