Interfacing TI Clocked FIFOs With TI Floating-Point DSPs (Rev. A)

Texas Instruments

Published Date: 03/01/1996

Description

FIFO memories are used in digital signal processing systems for matching data paths with asynchronous clock or data rates. This document shows the SN74ACT3632 512?36?2 clocked FIFO as a single-chip bi-directional buffering solution that interfaces to the TI TMS320C3x and TMS320C4x floating-point DSP family. Programmable FIFO flags enable DMA control techniques that are used to handle the data flow

Parts

Part Number Name Companion Part
5962-9052604MUA 5962-9052604MUA Buy Datasheet
5962-9052604MXA 5962-9052604MXA Buy Datasheet
5962-9052604Q9A 5962-9052604Q9A Datasheet
5962-9052604Q9B 5962-9052604Q9B Buy Datasheet
5962-9052605MXA 5962-9052605MXA Buy Datasheet
5962-9052605QXC 5962-9052605QXC Buy Datasheet
5962-9205803MYA 5962-9205803MYA Buy Datasheet
5962-9205804MYA 5962-9205804MYA Buy Datasheet
5962-9205805QXA 5962-9205805QXA Buy Datasheet
5962-9205805QYA 5962-9205805QYA Buy Datasheet