Description

The TI SN74ACT36xx 36-bit clocked FIFO family interfaces to a 32-bit floating-point DSP allowing high-integrity data transfer and improving system throughput. This document describes the patented synchronous retransmit FIFO feature used with a DSP for FIR digital filtering. Two examples of DSP application specific FIFOs are given. The first uses the unidirectional SN74ACT3641 (1024 ? 36) FIFO a