The PMP10601 reference design provides all the power supply rails necessary to power Xilinx® Zynq® 7000 series (XC7Z015) FPGA. This design uses several LMZ3 series modules: LDOs: and a DDR termination regulator to provide all the necessary rails to power the FPGA. It also features one LM3880 for power up and power down sequencing. This design uses a 12V input.
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Download the test file for PMP10601Title | Updated | Type | Size (KB) | |
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PMP10601 Gerber | 16 Jan 2015 | ZIP | 9147 | |
PMP10601 BOM | 16 Jan 2015 | 123 | ||
PMP10601 Schematic | 16 Jan 2015 | 326 |