This reference design generates a 12V/16A output from a standard 48V DC telecom input. The UCC2897A controls an active clamp forward converter power stage. The low gate charge and low RDSon of the CSD19533Q51: implemented as self-driven synchronous rectifiers: allow this design to achieve a peak efficiency of 95%. The compact UCC27511 drivers simplify the gate drive circuitry for the synchronous rectifiers.
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Download the test file for PMP3162Title | Updated | Type | Size (KB) | |
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PMP3162 Assembly Drawing | 24 Oct 2014 | 89 | ||
PMP3162 Gerber | 24 Oct 2014 | ZIP | 230 | |
PMP3162 Schematic | 24 Oct 2014 | 180 | ||
PMP3162 PCB | 24 Oct 2014 | 416 | ||
PMP3162 BOM | 24 Oct 2014 | 84 |