PMP5364 Reference Design

Texas Instruments

36V-72V Input 5V: 20A 95% Efficient Active Clamp Forward 1/4 Brick Power Reference Design

Description

The PMP5364 reference design provides 5V at 20A (100W) from a standard 48V telecom input with up to 95% efficiency. This design uses the UCC2897A active clamp controller along with TI NexFET synchronous rectifiers. The low Rdson of the CSD17301Q5A reduces conduction losses and die area of the synchronous rectifiers. The circuit is built in an industry standard 1/4 brick footprint.

Features
  • 36V-72V Input 5V/20A output (100W) 95% efficiency Industry Standard: Quarter Brick Footprint Features UCC2897A Controller along with TI NexFET Synchronous Rectifiers Active Clamp Forward Topology Reduced conduction losses and die area of the synchronous rectifiers
Applications
  • Baseband unit (BBU)
  • Active antenna system mMIMO (AAS)
  • Indoor backhaul
  • Macro remote radio unit (RRU)
Product Categories
  • Power management

Parts

Part Number Name Companion Part
UCC2897A UCC2897A Buy Datasheet

Bill Of Materials

Download the bill of materials for PMP5364 Download

Schematic

Quickly understand overall system functionality.

Download the schematic for PMP5364

Test Data

Get results faster with test and simulation data that's been verified.

Download the test file for PMP5364

Other Documents

Title Updated Type Size (KB)
PMP5364 PCB 01 Feb 2012 PDF 139
PMP5364 Gerber 01 Feb 2012 ZIP 176
PMP5364 BOM 11 Nov 2011 PDF 22
PMP5364 Schematic 11 Nov 2011 PDF 78