The PMP8930 reference design uses the UCC28710 primary-side regulated flyback controller to generate a 20V output from a univeral AC input. a bulk capacitor with slow-charge-fast-discharge circuit is placed at flyback output to provide long hold up time for the following step-down DC-DC stages. TPS54335 is used as the controller and power stage for the main 4V or 12V output. The valley switching of the UCC28710 allows this low-cost design to achieve a maximum load efficiency of 83%; no load losses are less than 70mW.
Title | Updated | Type | Size (KB) | |
---|---|---|---|---|
PMP8930.5 BOM | 12 Sep 2013 | 120 | ||
PMP8930.5 Schematic | 12 Sep 2013 | 133 | ||
PMP8930.4 BOM | 12 Sep 2013 | 120 | ||
PMP8930.4 Schematic | 12 Sep 2013 | 133 | ||
PMP8930.3 BOM | 12 Sep 2013 | 120 | ||
PMP8930.3 Schematic | 12 Sep 2013 | 133 | ||
PMP8930.2 BOM | 12 Sep 2013 | 120 | ||
PMP8930.2 Schematic | 12 Sep 2013 | 133 | ||
PMP8930.1 Gerber | 12 Sep 2013 | ZIP | 233 | |
PMP8930.1 BOM | 12 Sep 2013 | 120 | ||
PMP8930.1 Schematic | 12 Sep 2013 | 133 |