This reference design generates a 5V/15A output from a 36V to 75V telecom input. The UCC2897A controls an active clamp forward converter power stage. The low gate charge and low RDSon of the CSD17501Q5A and CSD18502Q5B: implemented as a synchronous rectifiers: provides for a highly efficient design. This design is laid out in a standard eighth brick footprint and achieves efficiencies up to 94%. It uses only surface mount components: including ceramic output capacitors.
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Download the test file for PMP9126Title | Updated | Type | Size (KB) | |
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PMP9126 Gerber | 22 Oct 2013 | ZIP | 213 | |
PMP9126 PCB | 22 Oct 2013 | 384 | ||
PMP9126 BOM | 22 Oct 2013 | 82 | ||
PMP9126 Schematic | 22 Oct 2013 | 144 |