PMP9335 is designed for Xilinx Zynq FPGA applications utilizing the TPS84A20 and TPS84320. This design uses an external timer to synchronize the switching frequency to 300 kHz. It also employs a controlled power up and power down sequence.
Download the bill of materials for PMP9335 | Download |
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Download the test file for PMP9335Title | Updated | Type | Size (KB) | |
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PMP9335 Gerber | 28 Sep 2015 | ZIP | 299 | |
PMP9335 CAD Files | 28 Sep 2015 | ZIP | 557 | |
PMP9335 PCB | 28 Sep 2015 | 1516 | ||
PMP9335 Assembly Drawing | 28 Sep 2015 | 168 | ||
PMP9335 BOM | 28 Sep 2015 | 121 | ||
PMP9335 Schematic | 28 Sep 2015 | 446 |