This reference design generates a 12V/21A output from 54V DC input. The UCC2897A controls an active clamp forward converter power stage. The low gate charge and low RDSon of the CSD18532Q5B: implemented as self-driven synchronous rectifiers: allow this design to achieve a max load efficiency of nearly 96%. The compact UCC27511 drivers simplify the gate drive circuitry for the synchronous rectifiers.
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Download the test file for PMP9656Title | Updated | Type | Size (KB) | |
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PMP9656 PCB | 16 Oct 2014 | 424 | ||
PMP9656 Assembly Drawing | 16 Oct 2014 | 89 | ||
PMP9656 BOM | 16 Oct 2014 | 84 | ||
PMP9656 Schematic | 16 Oct 2014 | 159 |