This reference design and the associated example Verilog code can be used as a starting point for interfacing Altera FPGAs to Texas Instruments' high-speed LVDS-interface analog-to-digital converters (ADC) and digital-to-analog converters (DAC). The firmware implementation is explained and the required timing constraints are discussed.
Download the bill of materials for TIDA-00069 | Download |
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Download the test file for TIDA-00069Title | Updated | Type | Size (KB) | |
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TIDA-00069 BOM (3 files) | 10 Dec 2013 | ZIP | 191 | |
TIDA-00069 Schematic (3 files) | 04 Dec 2013 | ZIP | 815 |