This reference design is a 12-Gbps low-cost bit error tester (BERT) capable of generating and checking up to 8 channels of pseudo-random binary sequences (PRBS). This validated design is a convenient way to generate multi-channels high speed serial bit streams of up to 12-Gbps: and checking incoming serial bit streams for possble bit errors. This design can be used as a hand-held BERT useful for evaluating the signal integrity and bit error error performance of a high speed sub-system.
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Download the bill of materials for TIDA-00426 | Download |
Title | Updated | Type | Size (KB) | |
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TIDA-00426 Gerber | 13 Jun 2016 | ZIP | 467 | |
TIDA-00426 CAD Files | 13 Jun 2016 | ZIP | 5011 | |
TIDA-00426 PCB | 13 Jun 2016 | 3746 | ||
TIDA-00426 Assembly Drawing | 13 Jun 2016 | 122 | ||
TIDA-00426 BOM | 13 Jun 2016 | 231 | ||
TIDA-00426 Schematic | 13 Jun 2016 | 2132 |