Reference Design Optimizing FPGA Utilization and Data Throughput for Automatic Test Equipment
Description
The TIDA-01051 reference design is used to demonstrate optimized channel density: integration: power consumption: clock distribution and signal chain performance of very high channel count data acquisition (DAQ) systems such as those used in automatic test equipment (ATE). Using serializers: such as TI’s DS90C383B: to combine many simultaneously sampling ADC outputs into several LVDS lines dramatically reduces the number of pins the host FPGA must process. As a result: a single FPGA can process a significantly increased number of DAQ channels and board routing complexity is greatly reduced.
Features
- Two 20 bit SAR ADC channels (expendable up to 28)Three level MUX tree (up to 64 channels per ADC)Highlights throughput improvements using serialized ADC output dataModular front-end reference design for high channel count systems that can be repeatedUp to +/-12V input signal (+/-24Vpp differential)
Applications
- Oscilloscopes & digitizers
- Digital multimeter (DMM)
- Flat panel
- Full authority digital engine control (FADEC)
- Lab & field Instrumentation
- Automotive test
- Data acquisition (DAQ)
- Electronic warfare
- Power analyzer
- Source measurement unit (SMU)
- Parametric measurement unit (PMU)
- Off-highway vehicles HMI & display
- Flat panel display (FPD) shorting bar pattern generator
- Battery cell formation & test equipment
- Robot teach pendant (HMI)
- HMI panel
Product Categories
- Interface