This reference design showcases an interface implementation for connecting multiple high voltage bipolar input, 8-channel, mux-input SAR ADCs (6) with the Sitara Arm processors for expanding the number of input channels using Programmable Real-time Unit (PRU-ICSS). ADCs are configured for simultaneous sampling of the same channels across all ADCs. The design highlights the capability of PRU-ICSS to handle 1536ksps (each sample = 16 bits) data rate by sampling 640 samples per line cycle. For 50Hz cycle, this corresponds to 32ksps per channel across 6 ADCs simultaneously (640 samples/cycle*50Hz*6 ADCs*8 Ch = 1536ksps). Also, the second PRU is used to post process the data to achieve coherent sampling.
Part Number | Name | Companion Part | |
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ADS8688ATDBTR | ADS8688ATDBTR | Buy Datasheet | |
AM3356BZCZA30 | AM3356BZCZA30 | Buy Datasheet | |
AM3357BZCZA60 | AM3357BZCZA60 | Buy Datasheet | |
AM3358BZCE60 | AM3358BZCE60 | Buy Datasheet | |
AM3359BZCZA80 | AM3359BZCZA80 | Buy Datasheet | |
CDCLVC1106PWR | CDCLVC1106PWR | Buy Datasheet | |
LP2992IM5X-5.0/NOPB | LP2992IM5X-5.0/NOPB | Buy Datasheet | |
OPA4197ID | OPA4197ID | Buy Datasheet | |
SN74LV1T04DCKRG4 | SN74LV1T04DCKRG4 | Buy Datasheet | |
SN74LVC1G17DCK3 | SN74LVC1G17DCK3 | Buy Datasheet | |
TPS22914CYFPR | TPS22914CYFPR | Buy Datasheet | |
TPS65131RGET | TPS65131RGET | Buy Datasheet | |
TPS7A3901DSCR | TPS7A3901DSCR | Buy Datasheet | |
TPS7A6550QKVUQ1 | TPS7A6550QKVUQ1 | Buy |
Download the bill of materials for TIDA-01555 | Download |
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Download the test file for TIDA-01555Title | Updated | Type | Size (KB) | |
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Flexible Interface (PRU-ICSS) Reference Design for Simultaneous, Coherent DAQ (Rev. A) | 03 Jan 2019 | 1929 | ||
TIDA-01555 Gerber | 20 Dec 2017 | ZIP | 7628 | |
TIDA-01555 CAD Files | 20 Dec 2017 | ZIP | 5446 | |
TIDA-01555 Layer Plots | 20 Dec 2017 | ZIP | 4674 | |
TIDA-01555 Assembly Files | 20 Dec 2017 | ZIP | 733 | |
TIDA-01555 BOM Files | 20 Dec 2017 | ZIP | 400 | |
TIDA-01555 Schematic Files | 20 Dec 2017 | ZIP | 1659 |