10kW 3-Phase 3-Level Grid Tie Inverter Reference Design for Solar String Inverter
Description
This verified reference design provides an overview on how to implement a three-level three-phase SiC based DC:AC grid-tie inverter stage. Higher switching frequency of 50KHz reduces the size of magnetics for the filter design and enables higher power density. The use of SiC MOSFETs with switching loss ensures higher DC bus voltages of up to 1000V and lower switching losses with a peak efficiency of 99 percent. This design is configurable to work as a two-level or three-level inverter.
Features
- Rated nominal/max input voltage at 800V/1000VDC
- Max 10kW/10KVA output power at 400VAC 50/60Hz grid-tie connection
- Operating power factor range from 0.7lag to 0.7lead
- High voltage (1200V) SiCMosFET based full bridge inverter for peak efficiency of 99%
- <2% output current THD at full load
- Isolated current sensing using AMC1301 for load current monitoring
- Isolated driver ISO5852S with reinforced isolation for driving High voltage SiC MOSFET and UCC5320S for driving middle Si IGBT
Applications
- String Inverters
Product Categories
- Power Management
| Download the bill of materials for TIDA-01606 | Download |
Test Data
Get results faster with test and simulation data that's been verified.
Download the test file for TIDA-01606| Title | Updated | Type | Size (KB) | |
|---|---|---|---|---|
| TIDA-01606 Gerber | 01 Mar 2018 | ZIP | 861 | |
| TIDA-01606 CAD Files | 01 Mar 2018 | ZIP | 10938 | |
| TIDA-01606 Layer Plots | 01 Mar 2018 | ZIP | 2718 | |
| TIDA-01606 Assembly Files | 01 Mar 2018 | ZIP | 522 | |
| TIDA-01606 BOM Files | 01 Mar 2018 | ZIP | 118 | |
| TIDA-01606 Schematic and Block Diagram Files | 01 Mar 2018 | ZIP | 949 |