TIDEP0035 Reference Design

Texas Instruments

ARM MPU with Integrated HIPERFACE DSL Master Interface Reference Design

Description

This reference design implements HIPERFACE DSL master protocol on Industrial Communication Sub-System (PRU-ICSS). The two-wire interface allows integration of position feedback wires into motor cable.  It consists of AM437x PRU-ICSS firmware and TIDA-00177 transceiver reference design.

Features
  • HIPERFACE DSL master protocol with register compatible interface to existing FPGA IP coreProgrammable approach using ICSS_L concurrently with DS filter and Industrial Ethernet (single chip drive)Internal and external sync pulse sourcesSupports cable length of up to 100 metersLine-delay compensation8x oversampling with sample-edge detectionLine diagnostics – quality monitor
Applications
  • Servo drive position feedback
  • AC drive position feedback
  • Servo drive functional safety module
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Bill Of Materials

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Schematic

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Test Data

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